114 lines
3.5 KiB
C
114 lines
3.5 KiB
C
/*******************************************************************************
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*
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* Intel Ethernet Controller XL710 Family Linux Driver
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* Copyright(c) 2013 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Contact Information:
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* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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******************************************************************************/
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#ifndef _I40E_ADMINQ_H_
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#define _I40E_ADMINQ_H_
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#include "i40e_osdep.h"
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#include "i40e_adminq_cmd.h"
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#define I40E_ADMINQ_DESC(R, i) \
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(&(((struct i40e_aq_desc *)((R).desc))[i]))
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#define I40E_ADMINQ_DESC_ALIGNMENT 4096
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struct i40e_adminq_ring {
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void *desc; /* Descriptor ring memory */
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void *details; /* ASQ details */
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union {
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struct i40e_dma_mem *asq_bi;
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struct i40e_dma_mem *arq_bi;
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} r;
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u64 dma_addr; /* Physical address of the ring */
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u16 count; /* Number of descriptors */
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u16 rx_buf_len; /* Admin Receive Queue buffer length */
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/* used for interrupt processing */
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u16 next_to_use;
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u16 next_to_clean;
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/* used for queue tracking */
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u32 head;
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u32 tail;
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u32 len;
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};
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/* ASQ transaction details */
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struct i40e_asq_cmd_details {
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void *callback; /* cast from type I40E_ADMINQ_CALLBACK */
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u64 cookie;
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u16 flags_ena;
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u16 flags_dis;
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bool async;
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bool postpone;
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};
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#define I40E_ADMINQ_DETAILS(R, i) \
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(&(((struct i40e_asq_cmd_details *)((R).details))[i]))
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/* ARQ event information */
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struct i40e_arq_event_info {
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struct i40e_aq_desc desc;
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u16 msg_size;
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u8 *msg_buf;
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};
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/* Admin Queue information */
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struct i40e_adminq_info {
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struct i40e_adminq_ring arq; /* receive queue */
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struct i40e_adminq_ring asq; /* send queue */
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u16 num_arq_entries; /* receive queue depth */
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u16 num_asq_entries; /* send queue depth */
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u16 arq_buf_size; /* receive queue buffer size */
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u16 asq_buf_size; /* send queue buffer size */
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u16 fw_maj_ver; /* firmware major version */
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u16 fw_min_ver; /* firmware minor version */
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u16 api_maj_ver; /* api major version */
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u16 api_min_ver; /* api minor version */
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struct mutex asq_mutex; /* Send queue lock */
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struct mutex arq_mutex; /* Receive queue lock */
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struct i40e_dma_mem asq_mem; /* send queue dynamic memory */
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struct i40e_dma_mem arq_mem; /* receive queue dynamic memory */
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/* last status values on send and receive queues */
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enum i40e_admin_queue_err asq_last_status;
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enum i40e_admin_queue_err arq_last_status;
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};
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/* general information */
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#define I40E_AQ_LARGE_BUF 512
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#define I40E_ASQ_CMD_TIMEOUT 100000 /* usecs */
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void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,
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u16 opcode);
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#endif /* _I40E_ADMINQ_H_ */
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