242 lines
5.6 KiB
ArmAsm
242 lines
5.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/kvm_asm.h>
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#include <asm/reg.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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#include <asm/exception-64s.h>
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#include <asm/asm-compat.h>
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#if defined(CONFIG_PPC_BOOK3S_64)
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#ifdef PPC64_ELF_ABI_v2
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#define FUNC(name) name
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#else
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#define FUNC(name) GLUE(.,name)
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#endif
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#define GET_SHADOW_VCPU(reg) addi reg, r13, PACA_SVCPU
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#elif defined(CONFIG_PPC_BOOK3S_32)
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#define FUNC(name) name
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#define GET_SHADOW_VCPU(reg) lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2)
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#endif /* CONFIG_PPC_BOOK3S_XX */
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#define VCPU_LOAD_NVGPRS(vcpu) \
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PPC_LL r14, VCPU_GPR(R14)(vcpu); \
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PPC_LL r15, VCPU_GPR(R15)(vcpu); \
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PPC_LL r16, VCPU_GPR(R16)(vcpu); \
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PPC_LL r17, VCPU_GPR(R17)(vcpu); \
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PPC_LL r18, VCPU_GPR(R18)(vcpu); \
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PPC_LL r19, VCPU_GPR(R19)(vcpu); \
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PPC_LL r20, VCPU_GPR(R20)(vcpu); \
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PPC_LL r21, VCPU_GPR(R21)(vcpu); \
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PPC_LL r22, VCPU_GPR(R22)(vcpu); \
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PPC_LL r23, VCPU_GPR(R23)(vcpu); \
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PPC_LL r24, VCPU_GPR(R24)(vcpu); \
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PPC_LL r25, VCPU_GPR(R25)(vcpu); \
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PPC_LL r26, VCPU_GPR(R26)(vcpu); \
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PPC_LL r27, VCPU_GPR(R27)(vcpu); \
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PPC_LL r28, VCPU_GPR(R28)(vcpu); \
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PPC_LL r29, VCPU_GPR(R29)(vcpu); \
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PPC_LL r30, VCPU_GPR(R30)(vcpu); \
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PPC_LL r31, VCPU_GPR(R31)(vcpu); \
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/*****************************************************************************
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* *
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* Guest entry / exit code that is in kernel module memory (highmem) *
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* *
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****************************************************************************/
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/* Registers:
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* r3: kvm_run pointer
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* r4: vcpu pointer
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*/
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_GLOBAL(__kvmppc_vcpu_run)
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kvm_start_entry:
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/* Write correct stack frame */
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mflr r0
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PPC_STL r0,PPC_LR_STKOFF(r1)
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/* Save host state to the stack */
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PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)
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/* Save r3 (kvm_run) and r4 (vcpu) */
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SAVE_2GPRS(3, r1)
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/* Save non-volatile registers (r14 - r31) */
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SAVE_NVGPRS(r1)
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/* Save CR */
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mfcr r14
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stw r14, _CCR(r1)
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/* Save LR */
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PPC_STL r0, _LINK(r1)
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/* Load non-volatile guest state from the vcpu */
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VCPU_LOAD_NVGPRS(r4)
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kvm_start_lightweight:
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/* Copy registers into shadow vcpu so we can access them in real mode */
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mr r3, r4
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bl FUNC(kvmppc_copy_to_svcpu)
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nop
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REST_GPR(4, r1)
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#ifdef CONFIG_PPC_BOOK3S_64
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/* Get the dcbz32 flag */
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PPC_LL r3, VCPU_HFLAGS(r4)
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rldicl r3, r3, 0, 63 /* r3 &= 1 */
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stb r3, HSTATE_RESTORE_HID5(r13)
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/* Load up guest SPRG3 value, since it's user readable */
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lwz r3, VCPU_SHAREDBE(r4)
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cmpwi r3, 0
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ld r5, VCPU_SHARED(r4)
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beq sprg3_little_endian
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sprg3_big_endian:
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#ifdef __BIG_ENDIAN__
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ld r3, VCPU_SHARED_SPRG3(r5)
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#else
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addi r5, r5, VCPU_SHARED_SPRG3
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ldbrx r3, 0, r5
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#endif
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b after_sprg3_load
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sprg3_little_endian:
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#ifdef __LITTLE_ENDIAN__
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ld r3, VCPU_SHARED_SPRG3(r5)
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#else
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addi r5, r5, VCPU_SHARED_SPRG3
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ldbrx r3, 0, r5
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#endif
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after_sprg3_load:
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mtspr SPRN_SPRG3, r3
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#endif /* CONFIG_PPC_BOOK3S_64 */
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PPC_LL r4, VCPU_SHADOW_MSR(r4) /* get shadow_msr */
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/* Jump to segment patching handler and into our guest */
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bl FUNC(kvmppc_entry_trampoline)
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nop
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/*
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* This is the handler in module memory. It gets jumped at from the
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* lowmem trampoline code, so it's basically the guest exit code.
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*
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*/
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/*
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* Register usage at this point:
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*
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* R1 = host R1
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* R2 = host R2
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* R12 = exit handler id
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* R13 = PACA
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* SVCPU.* = guest *
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* MSR.EE = 1
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*
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*/
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PPC_LL r3, GPR4(r1) /* vcpu pointer */
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/*
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* kvmppc_copy_from_svcpu can clobber volatile registers, save
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* the exit handler id to the vcpu and restore it from there later.
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*/
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stw r12, VCPU_TRAP(r3)
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/* Transfer reg values from shadow vcpu back to vcpu struct */
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bl FUNC(kvmppc_copy_from_svcpu)
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nop
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#ifdef CONFIG_PPC_BOOK3S_64
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/*
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* Reload kernel SPRG3 value.
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* No need to save guest value as usermode can't modify SPRG3.
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*/
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ld r3, PACA_SPRG_VDSO(r13)
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mtspr SPRN_SPRG_VDSO_WRITE, r3
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#endif /* CONFIG_PPC_BOOK3S_64 */
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/* R7 = vcpu */
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PPC_LL r7, GPR4(r1)
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PPC_STL r14, VCPU_GPR(R14)(r7)
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PPC_STL r15, VCPU_GPR(R15)(r7)
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PPC_STL r16, VCPU_GPR(R16)(r7)
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PPC_STL r17, VCPU_GPR(R17)(r7)
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PPC_STL r18, VCPU_GPR(R18)(r7)
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PPC_STL r19, VCPU_GPR(R19)(r7)
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PPC_STL r20, VCPU_GPR(R20)(r7)
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PPC_STL r21, VCPU_GPR(R21)(r7)
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PPC_STL r22, VCPU_GPR(R22)(r7)
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PPC_STL r23, VCPU_GPR(R23)(r7)
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PPC_STL r24, VCPU_GPR(R24)(r7)
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PPC_STL r25, VCPU_GPR(R25)(r7)
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PPC_STL r26, VCPU_GPR(R26)(r7)
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PPC_STL r27, VCPU_GPR(R27)(r7)
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PPC_STL r28, VCPU_GPR(R28)(r7)
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PPC_STL r29, VCPU_GPR(R29)(r7)
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PPC_STL r30, VCPU_GPR(R30)(r7)
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PPC_STL r31, VCPU_GPR(R31)(r7)
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/* Pass the exit number as 3rd argument to kvmppc_handle_exit */
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lwz r5, VCPU_TRAP(r7)
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/* Restore r3 (kvm_run) and r4 (vcpu) */
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REST_2GPRS(3, r1)
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bl FUNC(kvmppc_handle_exit_pr)
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/* If RESUME_GUEST, get back in the loop */
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cmpwi r3, RESUME_GUEST
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beq kvm_loop_lightweight
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cmpwi r3, RESUME_GUEST_NV
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beq kvm_loop_heavyweight
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kvm_exit_loop:
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PPC_LL r4, _LINK(r1)
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mtlr r4
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lwz r14, _CCR(r1)
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mtcr r14
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/* Restore non-volatile host registers (r14 - r31) */
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REST_NVGPRS(r1)
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addi r1, r1, SWITCH_FRAME_SIZE
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blr
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kvm_loop_heavyweight:
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PPC_LL r4, _LINK(r1)
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PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)
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/* Load vcpu and cpu_run */
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REST_2GPRS(3, r1)
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/* Load non-volatile guest state from the vcpu */
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VCPU_LOAD_NVGPRS(r4)
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/* Jump back into the beginning of this function */
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b kvm_start_lightweight
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kvm_loop_lightweight:
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/* We'll need the vcpu pointer */
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REST_GPR(4, r1)
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/* Jump back into the beginning of this function */
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b kvm_start_lightweight
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