68 lines
1.2 KiB
C
68 lines
1.2 KiB
C
/*
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* Common bits for X2APIC cluster/physical modes.
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*/
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#ifndef _ASM_X86_X2APIC_H
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#define _ASM_X86_X2APIC_H
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#include <asm/apic.h>
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#include <asm/ipi.h>
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#include <linux/cpumask.h>
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/*
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* Need to use more than cpu 0, because we need more vectors
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* when MSI-X are used.
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*/
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static const struct cpumask *x2apic_target_cpus(void)
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{
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return cpu_online_mask;
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}
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static int x2apic_apic_id_valid(int apicid)
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{
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return 1;
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}
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static int x2apic_apic_id_registered(void)
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{
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return 1;
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}
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/*
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* For now each logical cpu is in its own vector allocation domain.
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*/
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static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static void
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__x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
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{
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unsigned long cfg = __prepare_ICR(0, vector, dest);
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native_x2apic_icr_write(cfg, apicid);
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}
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static unsigned int x2apic_get_apic_id(unsigned long id)
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{
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return id;
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}
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static unsigned long x2apic_set_apic_id(unsigned int id)
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{
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return id;
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}
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static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
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{
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return initial_apicid >> index_msb;
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}
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static void x2apic_send_IPI_self(int vector)
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{
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apic_write(APIC_SELF_IPI, vector);
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}
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#endif /* _ASM_X86_X2APIC_H */
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