199 lines
4.6 KiB
C
199 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Atlantic Network Driver
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*
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* Copyright (C) 2014-2019 aQuantia Corporation
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* Copyright (C) 2019-2020 Marvell International Ltd.
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*/
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/* File aq_ring.h: Declaration of functions for Rx/Tx rings. */
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#ifndef AQ_RING_H
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#define AQ_RING_H
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#include "aq_common.h"
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struct page;
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struct aq_nic_cfg_s;
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struct aq_rxpage {
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struct page *page;
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dma_addr_t daddr;
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unsigned int order;
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unsigned int pg_off;
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};
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/* TxC SOP DX EOP
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* +----------+----------+----------+-----------
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* 8bytes|len l3,l4 | pa | pa | pa
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* +----------+----------+----------+-----------
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* 4/8bytes|len pkt |len pkt | | skb
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* +----------+----------+----------+-----------
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* 4/8bytes|is_gso |len,flags |len |len,is_eop
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* +----------+----------+----------+-----------
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*
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* This aq_ring_buff_s doesn't have endianness dependency.
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* It is __packed for cache line optimizations.
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*/
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struct __packed aq_ring_buff_s {
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union {
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/* RX/TX */
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dma_addr_t pa;
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/* RX */
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struct {
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u32 rss_hash;
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u16 next;
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u8 is_hash_l4;
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u8 rsvd1;
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struct aq_rxpage rxdata;
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u16 vlan_rx_tag;
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};
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/* EOP */
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struct {
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dma_addr_t pa_eop;
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struct sk_buff *skb;
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};
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/* TxC */
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struct {
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u32 mss;
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u8 len_l2;
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u8 len_l3;
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u8 len_l4;
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u8 is_ipv6:1;
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u8 rsvd2:7;
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u32 len_pkt;
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u16 vlan_tx_tag;
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};
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};
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union {
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struct {
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u32 len:16;
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u32 is_ip_cso:1;
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u32 is_udp_cso:1;
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u32 is_tcp_cso:1;
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u32 is_cso_err:1;
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u32 is_sop:1;
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u32 is_eop:1;
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u32 is_gso_tcp:1;
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u32 is_gso_udp:1;
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u32 is_mapped:1;
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u32 is_cleaned:1;
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u32 is_error:1;
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u32 is_vlan:1;
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u32 is_lro:1;
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u32 rsvd3:3;
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u16 eop_index;
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u16 rsvd4;
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};
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u64 flags;
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};
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};
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struct aq_ring_stats_rx_s {
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struct u64_stats_sync syncp; /* must be first */
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u64 errors;
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u64 packets;
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u64 bytes;
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u64 lro_packets;
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u64 jumbo_packets;
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u64 alloc_fails;
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u64 skb_alloc_fails;
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u64 polls;
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u64 pg_losts;
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u64 pg_flips;
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u64 pg_reuses;
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};
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struct aq_ring_stats_tx_s {
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struct u64_stats_sync syncp; /* must be first */
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u64 errors;
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u64 packets;
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u64 bytes;
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u64 queue_restarts;
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};
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union aq_ring_stats_s {
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struct aq_ring_stats_rx_s rx;
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struct aq_ring_stats_tx_s tx;
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};
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enum atl_ring_type {
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ATL_RING_TX,
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ATL_RING_RX,
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};
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struct aq_ring_s {
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struct aq_ring_buff_s *buff_ring;
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u8 *dx_ring; /* descriptors ring, dma shared mem */
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struct aq_nic_s *aq_nic;
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unsigned int idx; /* for HW layer registers operations */
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unsigned int hw_head;
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unsigned int sw_head;
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unsigned int sw_tail;
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unsigned int size; /* descriptors number */
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unsigned int dx_size; /* TX or RX descriptor size, */
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/* stored here for fater math */
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unsigned int page_order;
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union aq_ring_stats_s stats;
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dma_addr_t dx_ring_pa;
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enum atl_ring_type ring_type;
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};
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struct aq_ring_param_s {
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unsigned int vec_idx;
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unsigned int cpu;
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cpumask_t affinity_mask;
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};
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static inline void *aq_buf_vaddr(struct aq_rxpage *rxpage)
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{
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return page_to_virt(rxpage->page) + rxpage->pg_off;
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}
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static inline dma_addr_t aq_buf_daddr(struct aq_rxpage *rxpage)
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{
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return rxpage->daddr + rxpage->pg_off;
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}
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static inline unsigned int aq_ring_next_dx(struct aq_ring_s *self,
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unsigned int dx)
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{
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return (++dx >= self->size) ? 0U : dx;
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}
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static inline unsigned int aq_ring_avail_dx(struct aq_ring_s *self)
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{
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return (((self->sw_tail >= self->sw_head)) ?
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(self->size - 1) - self->sw_tail + self->sw_head :
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self->sw_head - self->sw_tail - 1);
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}
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struct aq_ring_s *aq_ring_tx_alloc(struct aq_ring_s *self,
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struct aq_nic_s *aq_nic,
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unsigned int idx,
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struct aq_nic_cfg_s *aq_nic_cfg);
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struct aq_ring_s *aq_ring_rx_alloc(struct aq_ring_s *self,
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struct aq_nic_s *aq_nic,
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unsigned int idx,
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struct aq_nic_cfg_s *aq_nic_cfg);
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int aq_ring_init(struct aq_ring_s *self, const enum atl_ring_type ring_type);
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void aq_ring_rx_deinit(struct aq_ring_s *self);
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void aq_ring_free(struct aq_ring_s *self);
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void aq_ring_update_queue_state(struct aq_ring_s *ring);
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void aq_ring_queue_wake(struct aq_ring_s *ring);
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void aq_ring_queue_stop(struct aq_ring_s *ring);
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bool aq_ring_tx_clean(struct aq_ring_s *self);
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int aq_ring_rx_clean(struct aq_ring_s *self,
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struct napi_struct *napi,
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int *work_done,
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int budget);
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int aq_ring_rx_fill(struct aq_ring_s *self);
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struct aq_ring_s *aq_ring_hwts_rx_alloc(struct aq_ring_s *self,
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struct aq_nic_s *aq_nic, unsigned int idx,
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unsigned int size, unsigned int dx_size);
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void aq_ring_hwts_rx_clean(struct aq_ring_s *self, struct aq_nic_s *aq_nic);
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unsigned int aq_ring_fill_stats_data(struct aq_ring_s *self, u64 *data);
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#endif /* AQ_RING_H */
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