4e958f33ee
Newer revisions of the AXI DMA IP (>= v7.1) support 64-bit addresses, both for the descriptors itself, as well as for the buffers they are pointing to. This is realised by adding "MSB" words for the next and phys pointer right behind the existing address word, now named "LSB". These MSB words live in formerly reserved areas of the descriptor. If the hardware supports it, write both words when setting an address. The buffer address is handled by two wrapper functions, the two occasions where we set the next pointers are open coded. For now this is guarded by a flag which we don't set yet. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| ll_temac.h | ||
| ll_temac_main.c | ||
| ll_temac_mdio.c | ||
| xilinx_axienet.h | ||
| xilinx_axienet_main.c | ||
| xilinx_axienet_mdio.c | ||
| xilinx_emaclite.c | ||