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The PCI VPD capability operates on a set of window registers in PCI config space. Writing to the address register triggers either a read or write, depending on the setting of the PCI_VPD_ADDR_F bit within the address register. The data register provides either the source for writes or the target for reads. This model is susceptible to being broken by concurrent access, for which the kernel has adopted a set of access functions to serialize these registers. Additionally, commits like |
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.. | ||
pci | ||
platform | ||
Kconfig | ||
Makefile | ||
vfio.c | ||
vfio_iommu_spapr_tce.c | ||
vfio_iommu_type1.c | ||
vfio_spapr_eeh.c | ||
virqfd.c |