165 lines
5.5 KiB
C
165 lines
5.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2020 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
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* Copyright (c) 2021 Vincent Mailhol <mailhol.vincent@wanadoo.fr>
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*/
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#ifndef _CAN_BITTIMING_H
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#define _CAN_BITTIMING_H
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#include <linux/netdevice.h>
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#include <linux/can/netlink.h>
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#define CAN_SYNC_SEG 1
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/* Kilobits and Megabits per second */
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#define CAN_KBPS 1000UL
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#define CAN_MBPS 1000000UL
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/* Megahertz */
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#define CAN_MHZ 1000000UL
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#define CAN_CTRLMODE_TDC_MASK \
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(CAN_CTRLMODE_TDC_AUTO | CAN_CTRLMODE_TDC_MANUAL)
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/*
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* struct can_tdc - CAN FD Transmission Delay Compensation parameters
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*
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* At high bit rates, the propagation delay from the TX pin to the RX
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* pin of the transceiver causes measurement errors: the sample point
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* on the RX pin might occur on the previous bit.
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*
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* To solve this issue, ISO 11898-1 introduces in section 11.3.3
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* "Transmitter delay compensation" a SSP (Secondary Sample Point)
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* equal to the distance from the start of the bit time on the TX pin
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* to the actual measurement on the RX pin.
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*
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* This structure contains the parameters to calculate that SSP.
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*
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* -+----------- one bit ----------+-- TX pin
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* |<--- Sample Point --->|
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*
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* --+----------- one bit ----------+-- RX pin
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* |<-------- TDCV -------->|
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* |<------- TDCO ------->|
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* |<----------- Secondary Sample Point ---------->|
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*
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* To increase precision, contrary to the other bittiming parameters
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* which are measured in time quanta, the TDC parameters are measured
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* in clock periods (also referred as "minimum time quantum" in ISO
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* 11898-1).
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*
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* @tdcv: Transmitter Delay Compensation Value. The time needed for
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* the signal to propagate, i.e. the distance, in clock periods,
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* from the start of the bit on the TX pin to when it is received
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* on the RX pin. @tdcv depends on the controller modes:
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*
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* CAN_CTRLMODE_TDC_AUTO is set: The transceiver dynamically
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* measures @tdcv for each transmitted CAN FD frame and the
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* value provided here should be ignored.
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*
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* CAN_CTRLMODE_TDC_MANUAL is set: use the fixed provided @tdcv
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* value.
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*
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* N.B. CAN_CTRLMODE_TDC_AUTO and CAN_CTRLMODE_TDC_MANUAL are
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* mutually exclusive. Only one can be set at a time. If both
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* CAN_TDC_CTRLMODE_AUTO and CAN_TDC_CTRLMODE_MANUAL are unset,
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* TDC is disabled and all the values of this structure should be
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* ignored.
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*
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* @tdco: Transmitter Delay Compensation Offset. Offset value, in
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* clock periods, defining the distance between the start of the
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* bit reception on the RX pin of the transceiver and the SSP
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* position such that SSP = @tdcv + @tdco.
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*
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* @tdcf: Transmitter Delay Compensation Filter window. Defines the
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* minimum value for the SSP position in clock periods. If the
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* SSP position is less than @tdcf, then no delay compensations
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* occur and the normal sampling point is used instead. The
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* feature is enabled if and only if @tdcv is set to zero
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* (automatic mode) and @tdcf is configured to a value greater
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* than @tdco.
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*/
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struct can_tdc {
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u32 tdcv;
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u32 tdco;
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u32 tdcf;
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};
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/*
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* struct can_tdc_const - CAN hardware-dependent constant for
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* Transmission Delay Compensation
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*
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* @tdcv_min: Transmitter Delay Compensation Value minimum value. If
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* the controller does not support manual mode for tdcv
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* (c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is
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* ignored.
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* @tdcv_max: Transmitter Delay Compensation Value maximum value. If
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* the controller does not support manual mode for tdcv
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* (c.f. flag CAN_CTRLMODE_TDC_MANUAL) then this value is
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* ignored.
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*
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* @tdco_min: Transmitter Delay Compensation Offset minimum value.
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* @tdco_max: Transmitter Delay Compensation Offset maximum value.
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* Should not be zero. If the controller does not support TDC,
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* then the pointer to this structure should be NULL.
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*
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* @tdcf_min: Transmitter Delay Compensation Filter window minimum
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* value. If @tdcf_max is zero, this value is ignored.
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* @tdcf_max: Transmitter Delay Compensation Filter window maximum
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* value. Should be set to zero if the controller does not
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* support this feature.
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*/
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struct can_tdc_const {
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u32 tdcv_min;
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u32 tdcv_max;
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u32 tdco_min;
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u32 tdco_max;
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u32 tdcf_min;
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u32 tdcf_max;
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};
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#ifdef CONFIG_CAN_CALC_BITTIMING
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int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,
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const struct can_bittiming_const *btc);
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void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,
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const struct can_bittiming *dbt,
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u32 *ctrlmode, u32 ctrlmode_supported);
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#else /* !CONFIG_CAN_CALC_BITTIMING */
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static inline int
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can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,
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const struct can_bittiming_const *btc)
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{
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netdev_err(dev, "bit-timing calculation not available\n");
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return -EINVAL;
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}
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static inline void
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can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,
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const struct can_bittiming *dbt,
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u32 *ctrlmode, u32 ctrlmode_supported)
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{
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}
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#endif /* CONFIG_CAN_CALC_BITTIMING */
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int can_get_bittiming(struct net_device *dev, struct can_bittiming *bt,
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const struct can_bittiming_const *btc,
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const u32 *bitrate_const,
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const unsigned int bitrate_const_cnt);
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/*
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* can_bit_time() - Duration of one bit
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*
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* Please refer to ISO 11898-1:2015, section 11.3.1.1 "Bit time" for
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* additional information.
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*
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* Return: the number of time quanta in one bit.
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*/
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static inline unsigned int can_bit_time(const struct can_bittiming *bt)
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{
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return CAN_SYNC_SEG + bt->prop_seg + bt->phase_seg1 + bt->phase_seg2;
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}
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#endif /* !_CAN_BITTIMING_H */
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