245 lines
6.6 KiB
C
245 lines
6.6 KiB
C
/*
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* MPC85xx setup and early boot code plus other random bits.
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* Copyright 2005 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc85xx.h>
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#include <asm/prom.h>
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#include <asm/mpic.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include "mpc85xx.h"
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#ifndef CONFIG_PCI
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unsigned long isa_io_base = 0;
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unsigned long isa_mem_base = 0;
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#endif
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/*
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* Internal interrupts are all Level Sensitive, and Positive Polarity
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*
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* Note: Likely, this table and the following function should be
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* obtained and derived from the OF Device Tree.
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*/
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static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
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MPC85XX_INTERNAL_IRQ_SENSES,
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0x0, /* External 0: */
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#if defined(CONFIG_PCI)
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */
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#else
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0x0, /* External 1: */
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0x0, /* External 2: */
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0x0, /* External 3: */
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0x0, /* External 4: */
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#endif
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
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0x0, /* External 6: */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
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0x0, /* External 8: */
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0x0, /* External 9: */
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0x0, /* External 10: */
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0x0, /* External 11: */
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};
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#ifdef CONFIG_PCI
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/*
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* interrupt routing
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*/
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int
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mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* This is little evil, but works around the fact
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* that revA boards have IDSEL starting at 18
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* and others boards (older) start at 12
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*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */
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{0, 0, 0, 0}, /* -- */
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{0, 0, 0, 0}, /* -- */
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{PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */
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{PIRQD, PIRQA, PIRQB, PIRQC},
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{PIRQC, PIRQD, PIRQA, PIRQB},
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{PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */
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};
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const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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}
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int
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mpc85xx_exclude_device(u_char bus, u_char devfn)
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{
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if (bus == 0 && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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else
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return PCIBIOS_SUCCESSFUL;
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}
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#endif /* CONFIG_PCI */
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void __init mpc85xx_ads_pic_init(void)
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{
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struct mpic *mpic1;
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phys_addr_t OpenPIC_PAddr;
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/* Determine the Physical Address of the OpenPIC regs */
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OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET;
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mpic1 = mpic_alloc(OpenPIC_PAddr,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250,
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mpc85xx_ads_openpic_initsenses,
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sizeof(mpc85xx_ads_openpic_initsenses),
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" OpenPIC ");
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BUG_ON(mpic1 == NULL);
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mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200);
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mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280);
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mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300);
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mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380);
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mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400);
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mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480);
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mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500);
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mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580);
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/* dummy mappings to get to 48 */
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mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600);
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mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680);
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mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700);
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mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780);
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/* External ints */
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mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000);
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mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080);
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mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100);
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mpic_init(mpic1);
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}
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/*
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* Setup the architecture
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*/
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static void __init mpc85xx_ads_setup_arch(void)
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{
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struct device_node *cpu;
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
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cpu = of_find_node_by_type(NULL, "cpu");
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if (cpu != 0) {
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unsigned int *fp;
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fp = (int *)get_property(cpu, "clock-frequency", NULL);
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if (fp != 0)
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loops_per_jiffy = *fp / HZ;
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else
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loops_per_jiffy = 50000000 / HZ;
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of_node_put(cpu);
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}
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#ifdef CONFIG_PCI
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for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
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add_bridge(np);
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = mpc85xx_map_irq;
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ppc_md.pci_exclude_device = mpc85xx_exclude_device;
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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}
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void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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uint memsize = total_memory;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
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seq_printf(m, "Machine\t\t: mpc85xx\n");
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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/* Display the amount of memory */
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seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc85xx_ads_probe(void)
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{
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/* We always match for now, eventually we should look at the flat
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dev tree to ensure this is the board we are suppose to run on
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*/
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return 1;
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}
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define_machine(mpc85xx_ads) {
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.name = "MPC85xx ADS",
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.probe = mpc85xx_ads_probe,
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.setup_arch = mpc85xx_ads_setup_arch,
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.init_IRQ = mpc85xx_ads_pic_init,
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.show_cpuinfo = mpc85xx_ads_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = mpc85xx_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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