77 lines
1.3 KiB
Plaintext
77 lines
1.3 KiB
Plaintext
/*
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* SoC core Device Tree for the ARM Integrator platforms
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*/
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/include/ "skeleton.dtsi"
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/ {
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timer@13000000 {
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reg = <0x13000000 0x100>;
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interrupt-parent = <&pic>;
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interrupts = <5>;
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};
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timer@13000100 {
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reg = <0x13000100 0x100>;
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interrupt-parent = <&pic>;
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interrupts = <6>;
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};
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timer@13000200 {
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reg = <0x13000200 0x100>;
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interrupt-parent = <&pic>;
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interrupts = <7>;
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};
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pic@14000000 {
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compatible = "arm,versatile-fpga-irq";
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <0x14000000 0x100>;
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clear-mask = <0xffffffff>;
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};
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flash@24000000 {
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compatible = "cfi-flash";
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reg = <0x24000000 0x02000000>;
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};
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fpga {
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compatible = "arm,amba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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interrupt-parent = <&pic>;
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/*
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* These PrimeCells are in the same locations and using the
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* same interrupts in all Integrators, however the silicon
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* version deployed is different.
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*/
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rtc@15000000 {
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reg = <0x15000000 0x1000>;
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interrupts = <8>;
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};
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uart@16000000 {
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reg = <0x16000000 0x1000>;
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interrupts = <1>;
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};
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uart@17000000 {
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reg = <0x17000000 0x1000>;
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interrupts = <2>;
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};
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kmi@18000000 {
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reg = <0x18000000 0x1000>;
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interrupts = <3>;
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};
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kmi@19000000 {
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reg = <0x19000000 0x1000>;
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interrupts = <4>;
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};
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};
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};
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