OpenCloudOS-Kernel/drivers/gpu
Maxime Ripard 4b72b10a64
drm/vc4: crtc: Move HVS channel init before the PV initialisation
In order to avoid stale pixels getting stuck in an intermediate FIFO
between the HVS and the pixelvalve on BCM2711, we need to configure the HVS
channel before the pixelvalve is reset and configured.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9d7c5a03bc1a1e6d50f7b617cc2d8a46a4bbb7bc.1599120059.git-series.maxime@cerno.tech
2020-09-07 18:03:58 +02:00
..
drm drm/vc4: crtc: Move HVS channel init before the PV initialisation 2020-09-07 18:03:58 +02:00
host1x gpu: host1x: debug: Dump push buffer state 2020-07-17 16:06:14 +02:00
ipu-v3 gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile 2020-07-20 15:16:05 +02:00
trace
vga vgaarb: mark vga_tryget static 2020-08-01 11:28:17 +02:00
Makefile