91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef _ASM_POWERPC_PROBES_H
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#define _ASM_POWERPC_PROBES_H
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#ifdef __KERNEL__
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/*
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* Definitions common to probes files
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*
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* Copyright IBM Corporation, 2012
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*/
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#include <linux/types.h>
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#include <asm/disassemble.h>
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#include <asm/ppc-opcode.h>
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#define BREAKPOINT_INSTRUCTION PPC_RAW_TRAP() /* trap */
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/* Trap definitions per ISA */
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#define IS_TW(instr) (((instr) & 0xfc0007fe) == 0x7c000008)
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#define IS_TD(instr) (((instr) & 0xfc0007fe) == 0x7c000088)
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#define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000)
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#define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000)
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#ifdef CONFIG_PPC64
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#define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \
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IS_TWI(instr) || IS_TDI(instr))
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#else
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#define is_trap(instr) (IS_TW(instr) || IS_TWI(instr))
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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#define MSR_SINGLESTEP (MSR_DE)
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#else
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#define MSR_SINGLESTEP (MSR_SE)
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#endif
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static inline bool can_single_step(u32 inst)
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{
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switch (get_op(inst)) {
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case OP_TRAP_64: return false;
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case OP_TRAP: return false;
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case OP_SC: return false;
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case OP_19:
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switch (get_xop(inst)) {
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case OP_19_XOP_RFID: return false;
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case OP_19_XOP_RFMCI: return false;
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case OP_19_XOP_RFDI: return false;
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case OP_19_XOP_RFI: return false;
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case OP_19_XOP_RFCI: return false;
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case OP_19_XOP_RFSCV: return false;
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case OP_19_XOP_HRFID: return false;
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case OP_19_XOP_URFID: return false;
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case OP_19_XOP_STOP: return false;
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case OP_19_XOP_DOZE: return false;
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case OP_19_XOP_NAP: return false;
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case OP_19_XOP_SLEEP: return false;
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case OP_19_XOP_RVWINKLE: return false;
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}
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break;
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case OP_31:
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switch (get_xop(inst)) {
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case OP_31_XOP_TRAP: return false;
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case OP_31_XOP_TRAP_64: return false;
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case OP_31_XOP_MTMSR: return false;
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case OP_31_XOP_MTMSRD: return false;
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}
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break;
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}
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return true;
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}
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/* Enable single stepping for the current task */
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static inline void enable_single_step(struct pt_regs *regs)
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{
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regs_set_return_msr(regs, regs->msr | MSR_SINGLESTEP);
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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/*
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* We turn off Critical Input Exception(CE) to ensure that the single
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* step will be for the instruction we have the probe on; if we don't,
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* it is possible we'd get the single step reported for CE.
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*/
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regs_set_return_msr(regs, regs->msr & ~MSR_CE);
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mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
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#ifdef CONFIG_PPC_47x
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isync();
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#endif
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#endif
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PROBES_H */
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