OpenCloudOS-Kernel/drivers/pinctrl/intel
Linus Torvalds ef991796be This is the bulk of pin control changes for the v4.16 kernel cycle:
Core changes:
 
 - After lengthy discussions and partly due to my ignorance, we have
   merged a patch making pinctrl_force_default() and pinctrl_force_sleep()
   reprogram the states into the hardware of any hogged pins, even
   if they are already in the desired state. This only apply to hogged
   pins since groups of pins owned by drivers need to be managed by
   each driver, lest they could not do things like runtime PM and
   put pins to sleeping state even if the system as a whole is not
   in sleep.
 
 New drivers:
 
 - New driver for the Microsemi Ocelot SoC. This is used in ethernet
   switches.
 
 - The X-Powers AXP209 GPIO driver was extended to also deal with pin
   control and moved over from the GPIO subsystem. This circuit is
   a mixed-mode integrated circuit which is part of AllWinner designs.
 
 - New subdriver for the Qualcomm MSM8998 SoC, core of a high end
   mobile devices (phones) chipset.
 
 - New subdriver for the ST Microelectronics STM32MP157 MPU and
   STM32F769 MCU from the STM32 family.
 
 - New subdriver for the MediaTek MT7622 SoC. This is used for routers,
   repeater, gateways and such network infrastructure.
 
 - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has
   multimedia features and target "smart devices", I guess in-car
   entertainment, in-flight entertainment, industrial control panels etc.
 
 General improvements:
 
 - Incremental improvements on the SH-PFC subdrivers for things like
   the CAN bus.
 
 - Enable the glitch filter on Baytrail GPIOs used for interrupts.
 
 - Proper handling of pins to GPIO ranges on the Semtec SX150X
 
 - An IRQ setup ordering fix on MCP23S08.
 
 - A good set of janitorial coding style fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJadGEKAAoJEEEQszewGV1zA4QQALs8edxhv4qV5vm50mTdrO3n
 QtRhJNb53j6MIKtjFnazMvh6MXRIP+08SyX9sDLi5AxINIVuyQh3mrcB6Zc9zN58
 +6jFFOIbfm5E8by4n3wnKm3F/WAbNBZph9eT2Rn3cDv9o9hQbyNJ50sQkQMCjd9X
 WGR353c3OL4zb3vU8t72G/RPYUY1w1SkG9bGzRuSif8LawDcN6v6MMo2XhZA6RqM
 3qYIG29vJ1n0weggUIBeSAJIzk4eMwcoWCbVWxhns5JGxw5VPES1zbSp1D+mbzRC
 01i5Pt/gD+cWN/Kk/zKIMo1OqLAl+uLr6hzepj6W+5wu9CcQz/BgvRx7HUqnqgyh
 S8cN4AOgWmW+T75pHypd1WVic3q0RCXkFY8jjHpCATDY+Z+js0lZRs3y4DBiJ2ys
 DMVBeumDINKqaZ6aLH6lVkm+SxXOUy143arQQIzi0/F7fAp68i+9ofIO8B5smEmd
 0S+3sT0sO5QXVgZJ0t0iGUUG5irXi8XtF5qvRmuFZUe0OLGgKX20oCdC0pH0WU4M
 OZO1Bvb8vmn1tddogO2WlHeg6amWdwxtDuBsLRO3YILLu3jwPjhNqNmErXzXEmWt
 TY9l2M1uQmoJibNpmTjOzSfj4OtUHMwkDrFRJHAcUPcKwdEy4MyzFL16ATnIwgY9
 AmyMLNWJd8Wazgc6BK6w
 =gLY/
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.16 kernel cycle.
  Like with GPIO it is actually a bit calm this time.

  Core changes:

   - After lengthy discussions and partly due to my ignorance, we have
     merged a patch making pinctrl_force_default() and
     pinctrl_force_sleep() reprogram the states into the hardware of any
     hogged pins, even if they are already in the desired state.

     This only apply to hogged pins since groups of pins owned by
     drivers need to be managed by each driver, lest they could not do
     things like runtime PM and put pins to sleeping state even if the
     system as a whole is not in sleep.

  New drivers:

   - New driver for the Microsemi Ocelot SoC. This is used in ethernet
     switches.

   - The X-Powers AXP209 GPIO driver was extended to also deal with pin
     control and moved over from the GPIO subsystem. This circuit is a
     mixed-mode integrated circuit which is part of AllWinner designs.

   - New subdriver for the Qualcomm MSM8998 SoC, core of a high end
     mobile devices (phones) chipset.

   - New subdriver for the ST Microelectronics STM32MP157 MPU and
     STM32F769 MCU from the STM32 family.

   - New subdriver for the MediaTek MT7622 SoC. This is used for
     routers, repeater, gateways and such network infrastructure.

   - New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC
     has multimedia features and target "smart devices", I guess in-car
     entertainment, in-flight entertainment, industrial control panels
     etc.

  General improvements:

   - Incremental improvements on the SH-PFC subdrivers for things like
     the CAN bus.

   - Enable the glitch filter on Baytrail GPIOs used for interrupts.

   - Proper handling of pins to GPIO ranges on the Semtec SX150X

   - An IRQ setup ordering fix on MCP23S08.

   - A good set of janitorial coding style fixes"

* tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits)
  pinctrl: mcp23s08: fix irq setup order
  pinctrl: Forward declare struct device
  pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
  pinctrl: stm32: add STM32F769 MCU support
  pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping
  pinctrl: sx150x: Register pinctrl before adding the gpiochip
  pinctrl: sx150x: Unregister the pinctrl on release
  pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe()
  pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show()
  pinctrl: pinmux: Use seq_putc() in pinmux_pins_show()
  pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show()
  pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
  pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
  pinctrl: uniphier: refactor drive strength get/set functions
  pinctrl: imx7ulp: constify struct imx_cfg_params_decode
  pinctrl: imx: constify struct imx_pinctrl_soc_info
  pinctrl: imx7d: simplify imx7d_pinctrl_probe
  pinctrl: imx: use struct imx_pinctrl_soc_info as a const
  pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly.
  pinctrl: qcom: Add msm8998 pinctrl driver
  ...
2018-02-02 14:22:53 -08:00
..
Kconfig pinctrl: intel: Add Intel Cedar Fork PCH pin controller support 2017-10-31 10:11:21 +01:00
Makefile This is the bulk of pin control changes for the v4.15 2017-11-16 10:57:11 -08:00
pinctrl-baytrail.c pinctrl: baytrail: Enable glitch filter for GPIOs used as interrupts 2018-01-08 08:15:46 +01:00
pinctrl-broxton.c pinctrl: broxton: No need to take pointer of a pointer 2017-01-30 14:45:12 +01:00
pinctrl-cannonlake.c pinctrl: cannonlake: Align GPIO number space with Windows 2017-11-29 13:46:28 +01:00
pinctrl-cedarfork.c pinctrl: intel: Add Intel Cedar Fork PCH pin controller support 2017-10-31 10:11:21 +01:00
pinctrl-cherryview.c This is the bulk of pin control changes for the v4.16 kernel cycle: 2018-02-02 14:22:53 -08:00
pinctrl-denverton.c pinctrl: denverton: Fix UART2 RTS pin mode 2017-11-29 10:29:40 +01:00
pinctrl-geminilake.c pinctrl: intel: Add Intel Gemini Lake pin controller support 2017-01-30 15:06:01 +01:00
pinctrl-intel.c pinctrl: intel: ensure error return ret is initialized 2017-12-07 09:59:39 +01:00
pinctrl-intel.h pinctrl: intel: Allow custom GPIO base for pad groups 2017-11-29 13:44:52 +01:00
pinctrl-lewisburg.c pinctrl: intel: Add Intel Lewisburg GPIO support 2017-08-22 15:42:19 +02:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Introduce ACPI device table 2017-11-29 10:29:45 +01:00
pinctrl-sunrisepoint.c pinctrl: intel: Add support for variable size pad groups 2017-06-09 13:01:35 +02:00