267 lines
6.7 KiB
C
267 lines
6.7 KiB
C
/*
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* OMAP4XXX L3 Interconnect error handling driver
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*
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* Copyright (C) 2011 Texas Corporation
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* Sricharan <r.sricharan@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include "omap_l3_noc.h"
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/*
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* Interrupt Handler for L3 error detection.
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* 1) Identify the L3 clockdomain partition to which the error belongs to.
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* 2) Identify the slave where the error information is logged
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* 3) Print the logged information.
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* 4) Add dump stack to provide kernel trace.
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*
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* Two Types of errors :
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* 1) Custom errors in L3 :
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* Target like DMM/FW/EMIF generates SRESP=ERR error
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* 2) Standard L3 error:
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* - Unsupported CMD.
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* L3 tries to access target while it is idle
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* - OCP disconnect.
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* - Address hole error:
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* If DSS/ISS/FDIF/USBHOSTFS access a target where they
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* do not have connectivity, the error is logged in
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* their default target which is DMM2.
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*
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* On High Secure devices, firewall errors are possible and those
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* can be trapped as well. But the trapping is implemented as part
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* secure software and hence need not be implemented here.
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*/
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static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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{
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struct omap4_l3 *l3 = _l3;
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int inttype, i, k;
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int err_src = 0;
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u32 std_err_main, err_reg, clear, masterid;
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void __iomem *base, *l3_targ_base;
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char *target_name, *master_name = "UN IDENTIFIED";
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/* Get the Type of interrupt */
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inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
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for (i = 0; i < L3_MODULES; i++) {
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/*
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* Read the regerr register of the clock domain
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* to determine the source
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*/
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base = l3->l3_base[i];
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err_reg = __raw_readl(base + l3_flagmux[i] +
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+ L3_FLAGMUX_REGERR0 + (inttype << 3));
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/* Get the corresponding error and analyse */
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if (err_reg) {
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/* Identify the source from control status register */
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err_src = __ffs(err_reg);
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/* Read the stderrlog_main_source from clk domain */
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l3_targ_base = base + *(l3_targ[i] + err_src);
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std_err_main = __raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_MAIN);
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masterid = __raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_MSTADDR);
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switch (std_err_main & CUSTOM_ERROR) {
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case STANDARD_ERROR:
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target_name =
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l3_targ_inst_name[i][err_src];
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WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
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target_name,
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__raw_readl(l3_targ_base +
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L3_TARG_STDERRLOG_SLVOFSLSB));
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/* clear the std error log*/
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clear = std_err_main | CLEAR_STDERR_LOG;
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writel(clear, l3_targ_base +
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L3_TARG_STDERRLOG_MAIN);
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break;
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case CUSTOM_ERROR:
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target_name =
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l3_targ_inst_name[i][err_src];
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for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
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if (masterid == l3_masters[k].id)
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master_name =
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l3_masters[k].name;
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}
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WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
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master_name, target_name);
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/* clear the std error log*/
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clear = std_err_main | CLEAR_STDERR_LOG;
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writel(clear, l3_targ_base +
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L3_TARG_STDERRLOG_MAIN);
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break;
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default:
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/* Nothing to be handled here as of now */
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break;
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}
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/* Error found so break the for loop */
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break;
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}
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}
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return IRQ_HANDLED;
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}
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static int omap4_l3_probe(struct platform_device *pdev)
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{
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static struct omap4_l3 *l3;
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struct resource *res;
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int ret;
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l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
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if (!l3)
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return -ENOMEM;
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platform_set_drvdata(pdev, l3);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "couldn't find resource 0\n");
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ret = -ENODEV;
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goto err0;
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}
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l3->l3_base[0] = ioremap(res->start, resource_size(res));
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if (!l3->l3_base[0]) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err0;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (!res) {
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dev_err(&pdev->dev, "couldn't find resource 1\n");
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ret = -ENODEV;
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goto err1;
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}
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l3->l3_base[1] = ioremap(res->start, resource_size(res));
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if (!l3->l3_base[1]) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err1;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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if (!res) {
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dev_err(&pdev->dev, "couldn't find resource 2\n");
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ret = -ENODEV;
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goto err2;
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}
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l3->l3_base[2] = ioremap(res->start, resource_size(res));
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if (!l3->l3_base[2]) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err2;
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}
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/*
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* Setup interrupt Handlers
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*/
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l3->debug_irq = platform_get_irq(pdev, 0);
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ret = request_irq(l3->debug_irq,
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l3_interrupt_handler,
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IRQF_DISABLED, "l3-dbg-irq", l3);
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if (ret) {
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pr_crit("L3: request_irq failed to register for 0x%x\n",
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l3->debug_irq);
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goto err3;
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}
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l3->app_irq = platform_get_irq(pdev, 1);
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ret = request_irq(l3->app_irq,
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l3_interrupt_handler,
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IRQF_DISABLED, "l3-app-irq", l3);
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if (ret) {
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pr_crit("L3: request_irq failed to register for 0x%x\n",
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l3->app_irq);
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goto err4;
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}
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return 0;
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err4:
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free_irq(l3->debug_irq, l3);
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err3:
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iounmap(l3->l3_base[2]);
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err2:
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iounmap(l3->l3_base[1]);
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err1:
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iounmap(l3->l3_base[0]);
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err0:
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kfree(l3);
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return ret;
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}
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static int omap4_l3_remove(struct platform_device *pdev)
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{
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struct omap4_l3 *l3 = platform_get_drvdata(pdev);
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free_irq(l3->app_irq, l3);
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free_irq(l3->debug_irq, l3);
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iounmap(l3->l3_base[0]);
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iounmap(l3->l3_base[1]);
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iounmap(l3->l3_base[2]);
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kfree(l3);
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return 0;
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}
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#if defined(CONFIG_OF)
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static const struct of_device_id l3_noc_match[] = {
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{.compatible = "ti,omap4-l3-noc", },
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{},
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};
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MODULE_DEVICE_TABLE(of, l3_noc_match);
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#else
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#define l3_noc_match NULL
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#endif
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static struct platform_driver omap4_l3_driver = {
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.probe = omap4_l3_probe,
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.remove = omap4_l3_remove,
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.driver = {
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.name = "omap_l3_noc",
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.owner = THIS_MODULE,
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.of_match_table = l3_noc_match,
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},
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};
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static int __init omap4_l3_init(void)
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{
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return platform_driver_register(&omap4_l3_driver);
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}
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postcore_initcall_sync(omap4_l3_init);
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static void __exit omap4_l3_exit(void)
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{
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platform_driver_unregister(&omap4_l3_driver);
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}
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module_exit(omap4_l3_exit);
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