22 lines
568 B
C
22 lines
568 B
C
#ifndef _ASM_POWERPC_AUXVEC_H
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#define _ASM_POWERPC_AUXVEC_H
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/*
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* We need to put in some extra aux table entries to tell glibc what
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* the cache block size is, so it can use the dcbz instruction safely.
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*/
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#define AT_DCACHEBSIZE 19
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#define AT_ICACHEBSIZE 20
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#define AT_UCACHEBSIZE 21
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/* A special ignored type value for PPC, for glibc compatibility. */
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#define AT_IGNOREPPC 22
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/* The vDSO location. We have to use the same value as x86 for glibc's
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* sake :-)
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*/
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#define AT_SYSINFO_EHDR 33
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#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
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#endif
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