249 lines
6.6 KiB
C
249 lines
6.6 KiB
C
/*
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* This file contains common routines for dealing with free of page tables
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* Along with common page table handling code
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*
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* Derived from arch/powerpc/mm/tlb_64.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/hardirq.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
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static unsigned long pte_freelist_forced_free;
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struct pte_freelist_batch
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{
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struct rcu_head rcu;
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unsigned int index;
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pgtable_free_t tables[0];
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};
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#define PTE_FREELIST_SIZE \
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((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
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/ sizeof(pgtable_free_t))
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static void pte_free_smp_sync(void *arg)
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{
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/* Do nothing, just ensure we sync with all CPUs */
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}
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/* This is only called when we are critically out of memory
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* (and fail to get a page in pte_free_tlb).
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*/
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static void pgtable_free_now(pgtable_free_t pgf)
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{
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pte_freelist_forced_free++;
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smp_call_function(pte_free_smp_sync, NULL, 1);
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pgtable_free(pgf);
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}
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static void pte_free_rcu_callback(struct rcu_head *head)
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{
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struct pte_freelist_batch *batch =
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container_of(head, struct pte_freelist_batch, rcu);
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unsigned int i;
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for (i = 0; i < batch->index; i++)
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pgtable_free(batch->tables[i]);
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free_page((unsigned long)batch);
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}
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static void pte_free_submit(struct pte_freelist_batch *batch)
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{
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INIT_RCU_HEAD(&batch->rcu);
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call_rcu(&batch->rcu, pte_free_rcu_callback);
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}
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void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (atomic_read(&tlb->mm->mm_users) < 2 ||
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cpumask_equal(mm_cpumask(tlb->mm), cpumask_of(smp_processor_id()))){
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pgtable_free(pgf);
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return;
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}
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if (*batchp == NULL) {
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*batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
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if (*batchp == NULL) {
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pgtable_free_now(pgf);
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return;
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}
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(*batchp)->index = 0;
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}
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(*batchp)->tables[(*batchp)->index++] = pgf;
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if ((*batchp)->index == PTE_FREELIST_SIZE) {
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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}
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void pte_free_finish(void)
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{
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/* This is safe since tlb_gather_mmu has disabled preemption */
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struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
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if (*batchp == NULL)
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return;
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pte_free_submit(*batchp);
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*batchp = NULL;
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}
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/*
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* Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags()
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*/
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static pte_t do_dcache_icache_coherency(pte_t pte)
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{
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unsigned long pfn = pte_pfn(pte);
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struct page *page;
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if (unlikely(!pfn_valid(pfn)))
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return pte;
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page = pfn_to_page(pfn);
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if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) {
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pr_debug("do_dcache_icache_coherency... flushing\n");
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flush_dcache_icache_page(page);
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set_bit(PG_arch_1, &page->flags);
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}
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else
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pr_debug("do_dcache_icache_coherency... already clean\n");
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return __pte(pte_val(pte) | _PAGE_HWEXEC);
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}
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static inline int is_exec_fault(void)
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{
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return current->thread.regs && TRAP(current->thread.regs) == 0x400;
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}
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/* We only try to do i/d cache coherency on stuff that looks like
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* reasonably "normal" PTEs. We currently require a PTE to be present
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* and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE
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*/
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static inline int pte_looks_normal(pte_t pte)
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{
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return (pte_val(pte) &
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(_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE)) ==
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(_PAGE_PRESENT);
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}
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#if defined(CONFIG_PPC_STD_MMU)
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/* Server-style MMU handles coherency when hashing if HW exec permission
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* is supposed per page (currently 64-bit only). Else, we always flush
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* valid PTEs in set_pte.
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*/
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static inline int pte_need_exec_flush(pte_t pte, int set_pte)
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{
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return set_pte && pte_looks_normal(pte) &&
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!(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
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cpu_has_feature(CPU_FTR_NOEXECUTE));
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}
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#elif _PAGE_HWEXEC == 0
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/* Embedded type MMU without HW exec support (8xx only so far), we flush
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* the cache for any present PTE
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*/
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static inline int pte_need_exec_flush(pte_t pte, int set_pte)
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{
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return set_pte && pte_looks_normal(pte);
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}
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#else
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/* Other embedded CPUs with HW exec support per-page, we flush on exec
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* fault if HWEXEC is not set
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*/
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static inline int pte_need_exec_flush(pte_t pte, int set_pte)
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{
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return pte_looks_normal(pte) && is_exec_fault() &&
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!(pte_val(pte) & _PAGE_HWEXEC);
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}
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#endif
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/*
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* set_pte stores a linux PTE into the linux page table.
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*/
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void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
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{
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#ifdef CONFIG_DEBUG_VM
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WARN_ON(pte_present(*ptep));
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#endif
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/* Note: mm->context.id might not yet have been assigned as
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* this context might not have been activated yet when this
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* is called.
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*/
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pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
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if (pte_need_exec_flush(pte, 1))
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pte = do_dcache_icache_coherency(pte);
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/* Perform the setting of the PTE */
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__set_pte_at(mm, addr, ptep, pte, 0);
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}
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/*
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* This is called when relaxing access to a PTE. It's also called in the page
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* fault path when we don't hit any of the major fault cases, ie, a minor
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* update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
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* handled those two for us, we additionally deal with missing execute
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* permission here on some processors
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*/
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int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep, pte_t entry, int dirty)
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{
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int changed;
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if (!dirty && pte_need_exec_flush(entry, 0))
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entry = do_dcache_icache_coherency(entry);
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changed = !pte_same(*(ptep), entry);
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if (changed) {
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if (!(vma->vm_flags & VM_HUGETLB))
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assert_pte_locked(vma->vm_mm, address);
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__ptep_set_access_flags(ptep, entry);
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flush_tlb_page_nohash(vma, address);
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}
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return changed;
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}
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#ifdef CONFIG_DEBUG_VM
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void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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if (mm == &init_mm)
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return;
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pgd = mm->pgd + pgd_index(addr);
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BUG_ON(pgd_none(*pgd));
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pud = pud_offset(pgd, addr);
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BUG_ON(pud_none(*pud));
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pmd = pmd_offset(pud, addr);
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BUG_ON(!pmd_present(*pmd));
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BUG_ON(!spin_is_locked(pte_lockptr(mm, pmd)));
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}
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#endif /* CONFIG_DEBUG_VM */
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