400 lines
7.0 KiB
Plaintext
400 lines
7.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree file for the Linksys WRT1900AC (Mamba).
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*
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* Note: this board is shipped with a new generation boot loader that
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* remaps internal registers at 0xf1000000. Therefore, if earlyprintk
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* is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
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* used.
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*
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* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
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*
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* Based on armada-xp-axpwifiap.dts:
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*
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* Copyright (C) 2013 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "armada-xp-mv78230.dtsi"
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/ {
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model = "Linksys WRT1900AC";
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compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
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"marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = &uart0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
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MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
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internal-regs {
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rtc@10300 {
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/* No crystal connected to the internal RTC */
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status = "disabled";
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};
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/* J10: VCC, NC, RX, NC, TX, GND */
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serial@12000 {
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <1>;
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status = "okay";
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};
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ethernet@70000 {
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy-mode = "rgmii-id";
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buffer-manager = <&bm>;
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bm,pool-long = <0>;
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bm,pool-short = <1>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ethernet@74000 {
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pinctrl-0 = <&ge1_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy-mode = "rgmii-id";
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <3>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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/* USB part of the eSATA/USB 2.0 port */
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usb@50000 {
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status = "okay";
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};
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i2c@11000 {
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status = "okay";
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clock-frequency = <100000>;
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tmp421@4c {
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compatible = "ti,tmp421";
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reg = <0x4c>;
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};
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tlc59116@68 {
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#address-cells = <1>;
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#size-cells = <0>;
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#gpio-cells = <2>;
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compatible = "ti,tlc59116";
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reg = <0x68>;
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wan_amber@0 {
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label = "mamba:amber:wan";
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reg = <0x0>;
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};
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wan_white@1 {
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label = "mamba:white:wan";
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reg = <0x1>;
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};
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wlan_2g@2 {
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label = "mamba:white:wlan_2g";
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reg = <0x2>;
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};
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wlan_5g@3 {
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label = "mamba:white:wlan_5g";
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reg = <0x3>;
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};
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esata@4 {
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label = "mamba:white:esata";
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reg = <0x4>;
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linux,default-trigger = "disk-activity";
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};
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usb2@5 {
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label = "mamba:white:usb2";
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reg = <0x5>;
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};
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usb3_1@6 {
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label = "mamba:white:usb3_1";
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reg = <0x6>;
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};
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usb3_2@7 {
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label = "mamba:white:usb3_2";
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reg = <0x7>;
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};
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wps_white@8 {
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label = "mamba:white:wps";
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reg = <0x8>;
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};
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wps_amber@9 {
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label = "mamba:amber:wps";
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reg = <0x9>;
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};
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};
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};
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bm@c8000 {
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status = "okay";
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};
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};
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bm-bppi {
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status = "okay";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&keys_pin>;
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pinctrl-names = "default";
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wps {
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label = "WPS";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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};
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reset {
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label = "Factory Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&power_led_pin>;
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pinctrl-names = "default";
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power {
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label = "mamba:white:power";
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gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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pwm_fan {
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/* SUNON HA4010V4-0000-C99 */
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compatible = "pwm-fan";
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pwms = <&gpio0 24 4000>;
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};
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};
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&pciec {
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status = "okay";
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/* Etron EJ168 USB 3.0 controller */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* First mini-PCIe port */
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pcie@2,0 {
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/* Port 0, Lane 1 */
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status = "okay";
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};
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/* Second mini-PCIe port */
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pcie@3,0 {
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/* Port 0, Lane 3 */
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status = "okay";
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};
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};
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&pinctrl {
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keys_pin: keys-pin {
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marvell,pins = "mpp32", "mpp33";
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marvell,function = "gpio";
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};
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power_led_pin: power-led-pin {
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marvell,pins = "mpp40";
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marvell,function = "gpio";
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};
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gpio_fan_pin: gpio-fan-pin {
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marvell,pins = "mpp24";
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marvell,function = "gpio";
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};
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "everspin,mr25h256";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <40000000>;
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};
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};
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&mdio {
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status = "okay";
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switch@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "internet";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <ð0>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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&nand_controller {
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status = "okay";
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nand@0 {
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reg = <0>;
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label = "pxa3xx_nand-0";
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nand-rb = <0>;
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marvell,nand-keep-config;
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nand-on-flash-bbt;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x100000>; /* 1MB */
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read-only;
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};
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partition@100000 {
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label = "u_env";
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reg = <0x100000 0x40000>; /* 256KB */
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};
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partition@140000 {
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label = "s_env";
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reg = <0x140000 0x40000>; /* 256KB */
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};
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partition@900000 {
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label = "devinfo";
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reg = <0x900000 0x100000>; /* 1MB */
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read-only;
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};
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/* kernel1 overlaps with rootfs1 by design */
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partition@a00000 {
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label = "kernel1";
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reg = <0xa00000 0x2800000>; /* 40MB */
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};
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partition@d00000 {
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label = "rootfs1";
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reg = <0xd00000 0x2500000>; /* 37MB */
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};
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/* kernel2 overlaps with rootfs2 by design */
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partition@3200000 {
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label = "kernel2";
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reg = <0x3200000 0x2800000>; /* 40MB */
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};
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partition@3500000 {
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label = "rootfs2";
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reg = <0x3500000 0x2500000>; /* 37MB */
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};
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/*
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* 38MB, last MB is for the BBT, not writable
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*/
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partition@5a00000 {
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label = "syscfg";
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reg = <0x5a00000 0x2600000>;
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};
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/*
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* Unused area between "s_env" and "devinfo".
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* Moved here because otherwise the renumbered
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* partitions would break the bootloader
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* supplied bootargs
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*/
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partition@180000 {
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label = "unused_area";
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reg = <0x180000 0x780000>; /* 7.5MB */
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};
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};
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};
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};
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