156 lines
4.1 KiB
C
156 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ASM_ARM_KVM_ARCH_TIMER_H
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#define __ASM_ARM_KVM_ARCH_TIMER_H
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#include <linux/clocksource.h>
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#include <linux/hrtimer.h>
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enum kvm_arch_timers {
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TIMER_PTIMER,
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TIMER_VTIMER,
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NR_KVM_EL0_TIMERS,
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TIMER_HVTIMER = NR_KVM_EL0_TIMERS,
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TIMER_HPTIMER,
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NR_KVM_TIMERS
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};
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enum kvm_arch_timer_regs {
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TIMER_REG_CNT,
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TIMER_REG_CVAL,
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TIMER_REG_TVAL,
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TIMER_REG_CTL,
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TIMER_REG_VOFF,
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};
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struct arch_timer_offset {
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/*
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* If set, pointer to one of the offsets in the kvm's offset
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* structure. If NULL, assume a zero offset.
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*/
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u64 *vm_offset;
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/*
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* If set, pointer to one of the offsets in the vcpu's sysreg
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* array. If NULL, assume a zero offset.
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*/
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u64 *vcpu_offset;
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};
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struct arch_timer_vm_data {
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/* Offset applied to the virtual timer/counter */
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u64 voffset;
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/* Offset applied to the physical timer/counter */
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u64 poffset;
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/* The PPI for each timer, global to the VM */
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u8 ppi[NR_KVM_TIMERS];
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};
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struct arch_timer_context {
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struct kvm_vcpu *vcpu;
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/* Emulated Timer (may be unused) */
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struct hrtimer hrtimer;
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u64 ns_frac;
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/* Offset for this counter/timer */
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struct arch_timer_offset offset;
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/*
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* We have multiple paths which can save/restore the timer state onto
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* the hardware, so we need some way of keeping track of where the
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* latest state is.
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*/
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bool loaded;
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/* Output level of the timer IRQ */
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struct {
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bool level;
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} irq;
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/* Duplicated state from arch_timer.c for convenience */
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u32 host_timer_irq;
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};
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struct timer_map {
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struct arch_timer_context *direct_vtimer;
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struct arch_timer_context *direct_ptimer;
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struct arch_timer_context *emul_vtimer;
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struct arch_timer_context *emul_ptimer;
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};
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void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map);
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struct arch_timer_cpu {
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struct arch_timer_context timers[NR_KVM_TIMERS];
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/* Background timer used when the guest is not running */
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struct hrtimer bg_timer;
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/* Is the timer enabled */
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bool enabled;
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};
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int __init kvm_timer_hyp_init(bool has_gic);
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int kvm_timer_enable(struct kvm_vcpu *vcpu);
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int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu);
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void kvm_timer_sync_user(struct kvm_vcpu *vcpu);
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bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu);
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void kvm_timer_update_run(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu);
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void kvm_timer_init_vm(struct kvm *kvm);
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u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid);
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int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value);
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int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
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int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
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int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);
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u64 kvm_phys_timer_read(void);
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void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
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void kvm_timer_init_vhe(void);
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#define vcpu_timer(v) (&(v)->arch.timer_cpu)
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#define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
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#define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER])
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#define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER])
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#define vcpu_hvtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HVTIMER])
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#define vcpu_hptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HPTIMER])
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#define arch_timer_ctx_index(ctx) ((ctx) - vcpu_timer((ctx)->vcpu)->timers)
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#define timer_vm_data(ctx) (&(ctx)->vcpu->kvm->arch.timer_data)
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#define timer_irq(ctx) (timer_vm_data(ctx)->ppi[arch_timer_ctx_index(ctx)])
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u64 kvm_arm_timer_read_sysreg(struct kvm_vcpu *vcpu,
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enum kvm_arch_timers tmr,
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enum kvm_arch_timer_regs treg);
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void kvm_arm_timer_write_sysreg(struct kvm_vcpu *vcpu,
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enum kvm_arch_timers tmr,
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enum kvm_arch_timer_regs treg,
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u64 val);
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/* Needed for tracing */
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u32 timer_get_ctl(struct arch_timer_context *ctxt);
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u64 timer_get_cval(struct arch_timer_context *ctxt);
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/* CPU HP callbacks */
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void kvm_timer_cpu_up(void);
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void kvm_timer_cpu_down(void);
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static inline bool has_cntpoff(void)
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{
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return (has_vhe() && cpus_have_final_cap(ARM64_HAS_ECV_CNTPOFF));
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}
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#endif
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