288 lines
7.7 KiB
Plaintext
288 lines
7.7 KiB
Plaintext
/*
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* Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* The Gumstix Overo must be combined with an expansion board.
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*/
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/ {
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memory@0 {
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device_type = "memory";
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reg = <0 0>;
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};
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pwmleds {
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compatible = "pwm-leds";
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overo {
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label = "overo:blue:COM";
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pwms = <&twl_pwmled 1 7812500>;
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max-brightness = <127>;
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linux,default-trigger = "mmc0";
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};
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};
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sound {
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compatible = "ti,omap-twl4030";
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ti,model = "overo";
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ti,mcbsp = <&mcbsp2>;
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};
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/* HS USB Port 2 Power */
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hsusb2_power: hsusb2_power_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>; /* gpio_168: vbus enable */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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/* HS USB Host PHY on PORT 2 */
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hsusb2_phy: hsusb2_phy {
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */
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vcc-supply = <&hsusb2_power>;
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};
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/* Regulator to trigger the nPoweron signal of the Wifi module */
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w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
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compatible = "regulator-fixed";
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regulator-name = "regulator-w3cbw003c-npoweron";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */
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enable-active-high;
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};
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/* Regulator to trigger the nReset signal of the Wifi module */
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w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
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pinctrl-names = "default";
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pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
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compatible = "regulator-fixed";
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regulator-name = "regulator-w3cbw003c-wifi-nreset";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */
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startup-delay-us = <10000>;
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};
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/* Regulator to trigger the nReset signal of the Bluetooth module */
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w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset {
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compatible = "regulator-fixed";
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regulator-name = "regulator-w3cbw003c-bt-nreset";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */
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startup-delay-us = <10000>;
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};
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};
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&omap3_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusb2_pins
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>;
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */
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OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */
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OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */
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OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
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OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
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OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
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OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
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OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
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OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
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OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
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>;
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};
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/* WiFi/BT combo */
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w3cbw003c_pins: pinmux_w3cbw003c_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
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OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
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>;
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};
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hsusb2_pins: pinmux_hsusb2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
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OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
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OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
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OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
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OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
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OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
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OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */
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OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4) /* i2c2_sda.gpio_183 */
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>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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};
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};
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};
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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/* i2c2 pins are used for gpio */
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&i2c2 {
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status = "disabled";
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};
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/* on board microSD slot */
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <&vmmc1>;
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bus-width = <4>;
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};
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/* optional on board WiFi */
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <&w3cbw003c_npoweron>;
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vqmmc-supply = <&w3cbw003c_bt_nreset>;
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vmmc_aux-supply = <&w3cbw003c_wifi_nreset>;
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bus-width = <4>;
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cap-sdio-irq;
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non-removable;
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};
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&twl_gpio {
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ti,use-leds;
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};
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&usb_otg_hs {
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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phys = <&usb2_phy>;
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phy-names = "usb2-phy";
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mode = <3>;
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power = <50>;
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};
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&usbhshost {
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port2-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <0 &hsusb2_phy>;
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&mcbsp2 {
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status = "okay";
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>, /* CS0 */
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<4 0 0x2b000000 0x1000000>, /* CS4 */
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<5 0 0x2c000000 0x1000000>; /* CS5 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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linux,mtd-name= "micron,mt29c4g96maz";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SPL";
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reg = <0 0x80000>; /* 512KiB */
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};
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partition@80000 {
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label = "U-Boot";
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reg = <0x80000 0x1C0000>; /* 1792KiB */
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};
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partition@1c0000 {
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label = "Environment";
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reg = <0x240000 0x40000>; /* 256KiB */
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};
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partition@280000 {
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label = "Kernel";
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reg = <0x280000 0x800000>; /* 8192KiB */
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};
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partition@780000 {
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label = "Filesystem";
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reg = <0xA80000 0>;
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/* HACK: MTDPART_SIZ_FULL=0 so fill to end */
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};
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};
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};
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