233 lines
5.2 KiB
C
233 lines
5.2 KiB
C
/*
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* SH7619 Setup
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*
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* Copyright (C) 2006 Yoshinori Sato
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* Copyright (C) 2009 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <linux/io.h>
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enum {
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UNUSED = 0,
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/* interrupt sources */
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IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
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WDT, EDMAC, CMT0, CMT1,
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SCIF0, SCIF1, SCIF2,
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HIF_HIFI, HIF_HIFBI,
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DMAC0, DMAC1, DMAC2, DMAC3,
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SIOF,
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
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INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
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INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
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INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
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INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
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INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
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INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
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INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
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INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
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INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
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INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
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INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
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INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
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INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
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INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
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INTC_IRQ(SIOF, 108),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
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{ 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
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{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
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{ 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
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{ 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
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{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
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{ 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
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};
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static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
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NULL, prio_registers, NULL);
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static struct plat_sci_port scif0_platform_data = {
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.mapbase = 0xf8400000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 88, 88, 88, 88 },
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};
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static struct platform_device scif0_device = {
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.name = "sh-sci",
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.id = 0,
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.dev = {
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.platform_data = &scif0_platform_data,
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},
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};
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static struct plat_sci_port scif1_platform_data = {
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.mapbase = 0xf8410000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 92, 92, 92, 92 },
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};
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static struct platform_device scif1_device = {
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.name = "sh-sci",
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.id = 1,
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.dev = {
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.platform_data = &scif1_platform_data,
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},
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};
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static struct plat_sci_port scif2_platform_data = {
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.mapbase = 0xf8420000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 96, 96, 96, 96 },
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};
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static struct platform_device scif2_device = {
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.name = "sh-sci",
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.id = 2,
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.dev = {
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.platform_data = &scif2_platform_data,
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},
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};
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static struct resource eth_resources[] = {
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[0] = {
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.start = 0xfb000000,
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.end = 0xfb0001c8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 85,
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.end = 85,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device eth_device = {
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.name = "sh-eth",
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.id = -1,
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.dev = {
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.platform_data = (void *)1,
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},
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.num_resources = ARRAY_SIZE(eth_resources),
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.resource = eth_resources,
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};
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static struct sh_timer_config cmt0_platform_data = {
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.name = "CMT0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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static struct resource cmt0_resources[] = {
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[0] = {
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.name = "CMT0",
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.start = 0xf84a0072,
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.end = 0xf84a0077,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 86,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cmt0_device = {
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.name = "sh_cmt",
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.id = 0,
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.dev = {
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.platform_data = &cmt0_platform_data,
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},
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.resource = cmt0_resources,
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.num_resources = ARRAY_SIZE(cmt0_resources),
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};
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static struct sh_timer_config cmt1_platform_data = {
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.name = "CMT1",
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.channel_offset = 0x08,
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.timer_bit = 1,
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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static struct resource cmt1_resources[] = {
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[0] = {
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.name = "CMT1",
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.start = 0xf84a0078,
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.end = 0xf84a007d,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 87,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cmt1_device = {
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.name = "sh_cmt",
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.id = 1,
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.dev = {
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.platform_data = &cmt1_platform_data,
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},
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.resource = cmt1_resources,
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.num_resources = ARRAY_SIZE(cmt1_resources),
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};
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static struct platform_device *sh7619_devices[] __initdata = {
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&scif0_device,
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&scif1_device,
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&scif2_device,
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ð_device,
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&cmt0_device,
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&cmt1_device,
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};
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static int __init sh7619_devices_setup(void)
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{
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return platform_add_devices(sh7619_devices,
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ARRAY_SIZE(sh7619_devices));
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}
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arch_initcall(sh7619_devices_setup);
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void __init plat_irq_setup(void)
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{
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register_intc_controller(&intc_desc);
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}
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static struct platform_device *sh7619_early_devices[] __initdata = {
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&scif0_device,
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&scif1_device,
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&scif2_device,
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&cmt0_device,
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&cmt1_device,
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};
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#define STBCR3 0xf80a0000
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void __init plat_early_device_setup(void)
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{
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/* enable CMT clock */
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__raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);
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early_platform_add_devices(sh7619_early_devices,
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ARRAY_SIZE(sh7619_early_devices));
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}
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