385 lines
11 KiB
C
385 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Xinpeng xpp055c272 5.5" MIPI-DSI panel driver
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* Copyright (C) 2019 Theobroma Systems Design und Consulting GmbH
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*
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* based on
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*
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* Rockteck jh057n00900 5.5" MIPI-DSI panel driver
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* Copyright (C) Purism SPC 2019
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*/
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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#include <video/display_timing.h>
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#include <video/mipi_display.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/media-bus-format.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/regulator/consumer.h>
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/* Manufacturer specific Commands send via DSI */
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#define XPP055C272_CMD_ALL_PIXEL_OFF 0x22
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#define XPP055C272_CMD_ALL_PIXEL_ON 0x23
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#define XPP055C272_CMD_SETDISP 0xb2
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#define XPP055C272_CMD_SETRGBIF 0xb3
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#define XPP055C272_CMD_SETCYC 0xb4
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#define XPP055C272_CMD_SETBGP 0xb5
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#define XPP055C272_CMD_SETVCOM 0xb6
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#define XPP055C272_CMD_SETOTP 0xb7
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#define XPP055C272_CMD_SETPOWER_EXT 0xb8
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#define XPP055C272_CMD_SETEXTC 0xb9
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#define XPP055C272_CMD_SETMIPI 0xbA
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#define XPP055C272_CMD_SETVDC 0xbc
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#define XPP055C272_CMD_SETPCR 0xbf
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#define XPP055C272_CMD_SETSCR 0xc0
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#define XPP055C272_CMD_SETPOWER 0xc1
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#define XPP055C272_CMD_SETECO 0xc6
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#define XPP055C272_CMD_SETPANEL 0xcc
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#define XPP055C272_CMD_SETGAMMA 0xe0
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#define XPP055C272_CMD_SETEQ 0xe3
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#define XPP055C272_CMD_SETGIP1 0xe9
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#define XPP055C272_CMD_SETGIP2 0xea
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struct xpp055c272 {
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struct device *dev;
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struct drm_panel panel;
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struct gpio_desc *reset_gpio;
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struct regulator *vci;
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struct regulator *iovcc;
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bool prepared;
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};
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static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel)
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{
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return container_of(panel, struct xpp055c272, panel);
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}
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#define dsi_generic_write_seq(dsi, cmd, seq...) do { \
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static const u8 b[] = { cmd, seq }; \
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int ret; \
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ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
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if (ret < 0) \
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return ret; \
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} while (0)
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static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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struct device *dev = ctx->dev;
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/*
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* Init sequence was supplied by the panel vendor without much
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* documentation.
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*/
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
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0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
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0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,
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0x00, 0x00, 0x37);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
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0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
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0x00, 0x00);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR,
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0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
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0x00);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ,
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0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
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0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER,
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0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
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0x67, 0x77, 0x33, 0x33);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
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0xff, 0x01, 0xff);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
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msleep(20);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1,
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0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
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0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,
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0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
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0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42,
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0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58,
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0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,
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0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2,
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0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,
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0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
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0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88,
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0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,
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0xa0, 0x00, 0x00, 0x00, 0x00);
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dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
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0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
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0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,
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0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,
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0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13,
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0x11, 0x18);
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msleep(60);
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dev_dbg(dev, "Panel init sequence done\n");
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return 0;
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}
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static int xpp055c272_unprepare(struct drm_panel *panel)
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{
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struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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if (!ctx->prepared)
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return 0;
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ret = mipi_dsi_dcs_set_display_off(dsi);
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if (ret < 0)
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dev_err(ctx->dev, "failed to set display off: %d\n", ret);
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mipi_dsi_dcs_enter_sleep_mode(dsi);
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if (ret < 0) {
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dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);
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return ret;
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}
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regulator_disable(ctx->iovcc);
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regulator_disable(ctx->vci);
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ctx->prepared = false;
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return 0;
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}
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static int xpp055c272_prepare(struct drm_panel *panel)
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{
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struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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if (ctx->prepared)
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return 0;
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dev_dbg(ctx->dev, "Resetting the panel\n");
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ret = regulator_enable(ctx->vci);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to enable vci supply: %d\n", ret);
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return ret;
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}
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ret = regulator_enable(ctx->iovcc);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
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goto disable_vci;
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}
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gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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/* T6: 10us */
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usleep_range(10, 20);
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gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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/* T8: 20ms */
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msleep(20);
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ret = xpp055c272_init_sequence(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);
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goto disable_iovcc;
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}
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ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);
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goto disable_iovcc;
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}
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/* T9: 120ms */
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msleep(120);
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ret = mipi_dsi_dcs_set_display_on(dsi);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to set display on: %d\n", ret);
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goto disable_iovcc;
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}
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msleep(50);
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ctx->prepared = true;
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return 0;
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disable_iovcc:
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regulator_disable(ctx->iovcc);
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disable_vci:
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regulator_disable(ctx->vci);
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return ret;
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}
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static const struct drm_display_mode default_mode = {
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.hdisplay = 720,
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.hsync_start = 720 + 40,
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.hsync_end = 720 + 40 + 10,
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.htotal = 720 + 40 + 10 + 40,
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.vdisplay = 1280,
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.vsync_start = 1280 + 22,
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.vsync_end = 1280 + 22 + 4,
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.vtotal = 1280 + 22 + 4 + 11,
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.clock = 64000,
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.width_mm = 68,
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.height_mm = 121,
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};
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static int xpp055c272_get_modes(struct drm_panel *panel,
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struct drm_connector *connector)
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{
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struct xpp055c272 *ctx = panel_to_xpp055c272(panel);
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(connector->dev, &default_mode);
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if (!mode) {
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dev_err(ctx->dev, "Failed to add mode %ux%u@%u\n",
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default_mode.hdisplay, default_mode.vdisplay,
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drm_mode_vrefresh(&default_mode));
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return -ENOMEM;
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}
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drm_mode_set_name(mode);
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mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
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connector->display_info.width_mm = mode->width_mm;
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connector->display_info.height_mm = mode->height_mm;
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drm_mode_probed_add(connector, mode);
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return 1;
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}
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static const struct drm_panel_funcs xpp055c272_funcs = {
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.unprepare = xpp055c272_unprepare,
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.prepare = xpp055c272_prepare,
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.get_modes = xpp055c272_get_modes,
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};
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static int xpp055c272_probe(struct mipi_dsi_device *dsi)
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{
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struct device *dev = &dsi->dev;
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struct xpp055c272 *ctx;
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int ret;
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ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(ctx->reset_gpio)) {
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dev_err(dev, "cannot get reset gpio\n");
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return PTR_ERR(ctx->reset_gpio);
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}
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ctx->vci = devm_regulator_get(dev, "vci");
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if (IS_ERR(ctx->vci)) {
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ret = PTR_ERR(ctx->vci);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to request vci regulator: %d\n", ret);
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return ret;
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}
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ctx->iovcc = devm_regulator_get(dev, "iovcc");
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if (IS_ERR(ctx->iovcc)) {
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ret = PTR_ERR(ctx->iovcc);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to request iovcc regulator: %d\n", ret);
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return ret;
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}
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mipi_dsi_set_drvdata(dsi, ctx);
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ctx->dev = dev;
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dsi->lanes = 4;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET;
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drm_panel_init(&ctx->panel, &dsi->dev, &xpp055c272_funcs,
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DRM_MODE_CONNECTOR_DSI);
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ret = drm_panel_of_backlight(&ctx->panel);
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if (ret)
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return ret;
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drm_panel_add(&ctx->panel);
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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dev_err(dev, "mipi_dsi_attach failed: %d\n", ret);
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drm_panel_remove(&ctx->panel);
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return ret;
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}
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return 0;
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}
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static void xpp055c272_shutdown(struct mipi_dsi_device *dsi)
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{
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struct xpp055c272 *ctx = mipi_dsi_get_drvdata(dsi);
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int ret;
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ret = drm_panel_unprepare(&ctx->panel);
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if (ret < 0)
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dev_err(&dsi->dev, "Failed to unprepare panel: %d\n", ret);
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ret = drm_panel_disable(&ctx->panel);
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if (ret < 0)
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dev_err(&dsi->dev, "Failed to disable panel: %d\n", ret);
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}
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static int xpp055c272_remove(struct mipi_dsi_device *dsi)
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{
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struct xpp055c272 *ctx = mipi_dsi_get_drvdata(dsi);
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int ret;
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xpp055c272_shutdown(dsi);
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ret = mipi_dsi_detach(dsi);
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if (ret < 0)
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dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
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drm_panel_remove(&ctx->panel);
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return 0;
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}
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static const struct of_device_id xpp055c272_of_match[] = {
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{ .compatible = "xinpeng,xpp055c272" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, xpp055c272_of_match);
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static struct mipi_dsi_driver xpp055c272_driver = {
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.driver = {
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.name = "panel-xinpeng-xpp055c272",
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.of_match_table = xpp055c272_of_match,
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},
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.probe = xpp055c272_probe,
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.remove = xpp055c272_remove,
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.shutdown = xpp055c272_shutdown,
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};
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module_mipi_dsi_driver(xpp055c272_driver);
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MODULE_AUTHOR("Heiko Stuebner <heiko.stuebner@theobroma-systems.com>");
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MODULE_DESCRIPTION("DRM driver for Xinpeng xpp055c272 MIPI DSI panel");
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MODULE_LICENSE("GPL v2");
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