153 lines
4.3 KiB
Plaintext
153 lines
4.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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config USB_DWC3
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tristate "DesignWare USB3 DRD Core Support"
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depends on (USB || USB_GADGET) && HAS_DMA
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select USB_XHCI_PLATFORM if USB_XHCI_HCD
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select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
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help
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Say Y or M here if your system has a Dual Role SuperSpeed
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USB controller based on the DesignWare USB3 IP Core.
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If you choose to build this driver is a dynamically linked
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module, the module will be called dwc3.ko.
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if USB_DWC3
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config USB_DWC3_ULPI
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bool "Register ULPI PHY Interface"
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depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
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help
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Select this if you have ULPI type PHY attached to your DWC3
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controller.
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choice
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bool "DWC3 Mode Selection"
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default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
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default USB_DWC3_HOST if (USB && !USB_GADGET)
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default USB_DWC3_GADGET if (!USB && USB_GADGET)
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config USB_DWC3_HOST
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bool "Host only mode"
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depends on USB=y || USB=USB_DWC3
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help
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Select this when you want to use DWC3 in host mode only,
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thereby the gadget feature will be regressed.
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config USB_DWC3_GADGET
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bool "Gadget only mode"
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depends on USB_GADGET=y || USB_GADGET=USB_DWC3
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help
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Select this when you want to use DWC3 in gadget mode only,
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thereby the host feature will be regressed.
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config USB_DWC3_DUAL_ROLE
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bool "Dual Role mode"
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depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
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depends on (EXTCON=y || EXTCON=USB_DWC3)
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help
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This is the default mode of working of DWC3 controller where
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both host and gadget features are enabled.
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endchoice
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comment "Platform Glue Driver Support"
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config USB_DWC3_OMAP
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tristate "Texas Instruments OMAP5 and similar Platforms"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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depends on EXTCON || !EXTCON
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depends on OF
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default USB_DWC3
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help
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Some platforms from Texas Instruments like OMAP5, DRA7xxx and
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AM437x use this IP for USB2/3 functionality.
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Say 'Y' or 'M' here if you have one such device
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config USB_DWC3_EXYNOS
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tristate "Samsung Exynos Platform"
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depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
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default USB_DWC3
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help
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Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
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say 'Y' or 'M' if you have one such device.
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config USB_DWC3_PCI
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tristate "PCIe-based Platforms"
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depends on USB_PCI && ACPI
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default USB_DWC3
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help
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If you're using the DesignWare Core IP with a PCIe (but not HAPS
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platform), please say 'Y' or 'M' here.
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config USB_DWC3_HAPS
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tristate "Synopsys PCIe-based HAPS Platforms"
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depends on USB_PCI
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default USB_DWC3
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help
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If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
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platform, please say 'Y' or 'M' here.
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config USB_DWC3_KEYSTONE
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tristate "Texas Instruments Keystone2/AM654 Platforms"
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depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
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default USB_DWC3
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help
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Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
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Say 'Y' or 'M' here if you have one such device
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config USB_DWC3_MESON_G12A
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tristate "Amlogic Meson G12A Platforms"
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depends on OF && COMMON_CLK
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depends on ARCH_MESON || COMPILE_TEST
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default USB_DWC3
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select USB_ROLE_SWITCH
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select REGMAP_MMIO
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help
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Support USB2/3 functionality in Amlogic G12A platforms.
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Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_OF_SIMPLE
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tristate "Generic OF Simple Glue Layer"
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depends on OF && COMMON_CLK
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default USB_DWC3
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help
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Support USB2/3 functionality in simple SoC integrations.
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Currently supports Xilinx and Qualcomm DWC USB3 IP.
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Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_ST
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tristate "STMicroelectronics Platforms"
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depends on (ARCH_STI || COMPILE_TEST) && OF
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default USB_DWC3
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help
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STMicroelectronics SoCs with one DesignWare Core USB3 IP
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inside (i.e. STiH407).
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Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_QCOM
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tristate "Qualcomm Platform"
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depends on ARCH_QCOM || COMPILE_TEST
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depends on EXTCON || !EXTCON
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depends on (OF || ACPI)
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default USB_DWC3
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help
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Some Qualcomm SoCs use DesignWare Core IP for USB2/3
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functionality.
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This driver also handles Qscratch wrapper which is needed
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for peripheral mode support.
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Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_IMX8MP
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tristate "NXP iMX8MP Platform"
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depends on OF && COMMON_CLK
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depends on (ARCH_MXC && ARM64) || COMPILE_TEST
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default USB_DWC3
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help
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NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
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functionality.
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Say 'Y' or 'M' if you have one such device.
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endif
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