882 lines
24 KiB
C
882 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Ingenic JZ47xx IPU driver
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//
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// Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net>
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// Copyright (C) 2020, Daniel Silsby <dansilsby@gmail.com>
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#include "ingenic-drm.h"
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#include "ingenic-ipu.h"
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/gcd.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/time.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_property.h>
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#include <drm/drm_vblank.h>
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struct ingenic_ipu;
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struct soc_info {
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const u32 *formats;
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size_t num_formats;
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bool has_bicubic;
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bool manual_restart;
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void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
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unsigned int sharpness, bool downscale,
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unsigned int weight, unsigned int offset);
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};
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struct ingenic_ipu {
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struct drm_plane plane;
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struct drm_device *drm;
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struct device *dev, *master;
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struct regmap *map;
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struct clk *clk;
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const struct soc_info *soc_info;
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bool clk_enabled;
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unsigned int num_w, num_h, denom_w, denom_h;
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dma_addr_t addr_y, addr_u, addr_v;
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struct drm_property *sharpness_prop;
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unsigned int sharpness;
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};
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/* Signed 15.16 fixed-point math (for bicubic scaling coefficients) */
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#define I2F(i) ((s32)(i) * 65536)
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#define F2I(f) ((f) / 65536)
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#define FMUL(fa, fb) ((s32)(((s64)(fa) * (s64)(fb)) / 65536))
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#define SHARPNESS_INCR (I2F(-1) / 8)
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static inline struct ingenic_ipu *plane_to_ingenic_ipu(struct drm_plane *plane)
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{
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return container_of(plane, struct ingenic_ipu, plane);
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}
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/*
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* Apply conventional cubic convolution kernel. Both parameters
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* and return value are 15.16 signed fixed-point.
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*
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* @f_a: Sharpness factor, typically in range [-4.0, -0.25].
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* A larger magnitude increases perceived sharpness, but going past
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* -2.0 might cause ringing artifacts to outweigh any improvement.
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* Nice values on a 320x240 LCD are between -0.75 and -2.0.
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*
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* @f_x: Absolute distance in pixels from 'pixel 0' sample position
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* along horizontal (or vertical) source axis. Range is [0, +2.0].
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*
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* returns: Weight of this pixel within 4-pixel sample group. Range is
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* [-2.0, +2.0]. For moderate (i.e. > -3.0) sharpness factors,
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* range is within [-1.0, +1.0].
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*/
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static inline s32 cubic_conv(s32 f_a, s32 f_x)
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{
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const s32 f_1 = I2F(1);
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const s32 f_2 = I2F(2);
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const s32 f_3 = I2F(3);
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const s32 f_4 = I2F(4);
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const s32 f_x2 = FMUL(f_x, f_x);
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const s32 f_x3 = FMUL(f_x, f_x2);
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if (f_x <= f_1)
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return FMUL((f_a + f_2), f_x3) - FMUL((f_a + f_3), f_x2) + f_1;
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else if (f_x <= f_2)
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return FMUL(f_a, (f_x3 - 5 * f_x2 + 8 * f_x - f_4));
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else
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return 0;
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}
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/*
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* On entry, "weight" is a coefficient suitable for bilinear mode,
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* which is converted to a set of four suitable for bicubic mode.
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*
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* "weight 512" means all of pixel 0;
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* "weight 256" means half of pixel 0 and half of pixel 1;
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* "weight 0" means all of pixel 1;
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*
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* "offset" is increment to next source pixel sample location.
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*/
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static void jz4760_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
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unsigned int sharpness, bool downscale,
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unsigned int weight, unsigned int offset)
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{
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u32 val;
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s32 w0, w1, w2, w3; /* Pixel weights at X (or Y) offsets -1,0,1,2 */
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weight = clamp_val(weight, 0, 512);
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if (sharpness < 2) {
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/*
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* When sharpness setting is 0, emulate nearest-neighbor.
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* When sharpness setting is 1, emulate bilinear.
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*/
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if (sharpness == 0)
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weight = weight >= 256 ? 512 : 0;
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w0 = 0;
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w1 = weight;
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w2 = 512 - weight;
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w3 = 0;
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} else {
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const s32 f_a = SHARPNESS_INCR * sharpness;
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const s32 f_h = I2F(1) / 2; /* Round up 0.5 */
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/*
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* Note that always rounding towards +infinity here is intended.
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* The resulting coefficients match a round-to-nearest-int
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* double floating-point implementation.
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*/
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weight = 512 - weight;
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w0 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512 + weight) / 512));
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w1 = F2I(f_h + 512 * cubic_conv(f_a, I2F(0 + weight) / 512));
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w2 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512 - weight) / 512));
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w3 = F2I(f_h + 512 * cubic_conv(f_a, I2F(1024 - weight) / 512));
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w0 = clamp_val(w0, -1024, 1023);
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w1 = clamp_val(w1, -1024, 1023);
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w2 = clamp_val(w2, -1024, 1023);
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w3 = clamp_val(w3, -1024, 1023);
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}
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val = ((w1 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
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((w0 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB);
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regmap_write(ipu->map, reg, val);
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val = ((w3 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
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((w2 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB) |
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((offset & JZ4760_IPU_RSZ_OFFSET_MASK) << JZ4760_IPU_RSZ_OFFSET_LSB);
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regmap_write(ipu->map, reg, val);
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}
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static void jz4725b_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
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unsigned int sharpness, bool downscale,
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unsigned int weight, unsigned int offset)
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{
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u32 val = JZ4725B_IPU_RSZ_LUT_OUT_EN;
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unsigned int i;
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weight = clamp_val(weight, 0, 512);
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if (sharpness == 0)
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weight = weight >= 256 ? 512 : 0;
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val |= (weight & JZ4725B_IPU_RSZ_LUT_COEF_MASK) << JZ4725B_IPU_RSZ_LUT_COEF_LSB;
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if (downscale || !!offset)
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val |= JZ4725B_IPU_RSZ_LUT_IN_EN;
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regmap_write(ipu->map, reg, val);
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if (downscale) {
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for (i = 1; i < offset; i++)
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regmap_write(ipu->map, reg, JZ4725B_IPU_RSZ_LUT_IN_EN);
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}
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}
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static void ingenic_ipu_set_downscale_coefs(struct ingenic_ipu *ipu,
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unsigned int reg,
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unsigned int num,
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unsigned int denom)
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{
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unsigned int i, offset, weight, weight_num = denom;
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for (i = 0; i < num; i++) {
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weight_num = num + (weight_num - num) % (num * 2);
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weight = 512 - 512 * (weight_num - num) / (num * 2);
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weight_num += denom * 2;
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offset = (weight_num - num) / (num * 2);
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ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
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true, weight, offset);
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}
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}
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static void ingenic_ipu_set_integer_upscale_coefs(struct ingenic_ipu *ipu,
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unsigned int reg,
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unsigned int num)
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{
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/*
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* Force nearest-neighbor scaling and use simple math when upscaling
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* by an integer ratio. It looks better, and fixes a few problem cases.
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*/
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unsigned int i;
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for (i = 0; i < num; i++)
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ipu->soc_info->set_coefs(ipu, reg, 0, false, 512, i == num - 1);
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}
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static void ingenic_ipu_set_upscale_coefs(struct ingenic_ipu *ipu,
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unsigned int reg,
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unsigned int num,
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unsigned int denom)
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{
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unsigned int i, offset, weight, weight_num = 0;
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for (i = 0; i < num; i++) {
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weight = 512 - 512 * weight_num / num;
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weight_num += denom;
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offset = weight_num >= num;
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if (offset)
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weight_num -= num;
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ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
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false, weight, offset);
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}
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}
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static void ingenic_ipu_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
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unsigned int num, unsigned int denom)
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{
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/* Begin programming the LUT */
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regmap_write(ipu->map, reg, -1);
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if (denom > num)
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ingenic_ipu_set_downscale_coefs(ipu, reg, num, denom);
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else if (denom == 1)
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ingenic_ipu_set_integer_upscale_coefs(ipu, reg, num);
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else
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ingenic_ipu_set_upscale_coefs(ipu, reg, num, denom);
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}
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static int reduce_fraction(unsigned int *num, unsigned int *denom)
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{
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unsigned long d = gcd(*num, *denom);
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/* The scaling table has only 31 entries */
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if (*num > 31 * d)
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return -EINVAL;
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*num /= d;
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*denom /= d;
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return 0;
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}
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static inline bool osd_changed(struct drm_plane_state *state,
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struct drm_plane_state *oldstate)
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{
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return state->src_x != oldstate->src_x ||
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state->src_y != oldstate->src_y ||
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state->src_w != oldstate->src_w ||
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state->src_h != oldstate->src_h ||
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state->crtc_x != oldstate->crtc_x ||
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state->crtc_y != oldstate->crtc_y ||
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state->crtc_w != oldstate->crtc_w ||
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state->crtc_h != oldstate->crtc_h;
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}
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static void ingenic_ipu_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *oldstate)
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{
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struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
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struct drm_plane_state *state = plane->state;
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const struct drm_format_info *finfo;
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u32 ctrl, stride = 0, coef_index = 0, format = 0;
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bool needs_modeset, upscaling_w, upscaling_h;
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int err;
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if (!state || !state->fb)
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return;
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finfo = drm_format_info(state->fb->format->format);
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if (!ipu->clk_enabled) {
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err = clk_enable(ipu->clk);
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if (err) {
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dev_err(ipu->dev, "Unable to enable clock: %d\n", err);
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return;
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}
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ipu->clk_enabled = true;
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}
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/* Reset all the registers if needed */
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needs_modeset = drm_atomic_crtc_needs_modeset(state->crtc->state);
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if (needs_modeset) {
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regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RST);
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/* Enable the chip */
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regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
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JZ_IPU_CTRL_CHIP_EN | JZ_IPU_CTRL_LCDC_SEL);
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}
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/* New addresses will be committed in vblank handler... */
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ipu->addr_y = drm_fb_cma_get_gem_addr(state->fb, state, 0);
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if (finfo->num_planes > 1)
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ipu->addr_u = drm_fb_cma_get_gem_addr(state->fb, state, 1);
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if (finfo->num_planes > 2)
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ipu->addr_v = drm_fb_cma_get_gem_addr(state->fb, state, 2);
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if (!needs_modeset)
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return;
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/* Or right here if we're doing a full modeset. */
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regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
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regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
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regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
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if (finfo->num_planes == 1)
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regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_SPKG_SEL);
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ingenic_drm_plane_config(ipu->master, plane, DRM_FORMAT_XRGB8888);
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/* Set the input height/width/strides */
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if (finfo->num_planes > 2)
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stride = ((state->src_w >> 16) * finfo->cpp[2] / finfo->hsub)
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<< JZ_IPU_UV_STRIDE_V_LSB;
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if (finfo->num_planes > 1)
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stride |= ((state->src_w >> 16) * finfo->cpp[1] / finfo->hsub)
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<< JZ_IPU_UV_STRIDE_U_LSB;
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regmap_write(ipu->map, JZ_REG_IPU_UV_STRIDE, stride);
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stride = ((state->src_w >> 16) * finfo->cpp[0]) << JZ_IPU_Y_STRIDE_Y_LSB;
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regmap_write(ipu->map, JZ_REG_IPU_Y_STRIDE, stride);
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regmap_write(ipu->map, JZ_REG_IPU_IN_GS,
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(stride << JZ_IPU_IN_GS_W_LSB) |
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((state->src_h >> 16) << JZ_IPU_IN_GS_H_LSB));
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switch (finfo->format) {
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case DRM_FORMAT_XRGB1555:
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format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
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break;
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case DRM_FORMAT_XBGR1555:
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format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
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break;
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case DRM_FORMAT_RGB565:
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format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
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break;
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case DRM_FORMAT_BGR565:
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format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
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break;
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_XYUV8888:
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format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
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break;
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case DRM_FORMAT_XBGR8888:
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format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
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JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
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break;
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case DRM_FORMAT_YUYV:
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format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
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JZ_IPU_D_FMT_YUV_VY1UY0;
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break;
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case DRM_FORMAT_YVYU:
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format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
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JZ_IPU_D_FMT_YUV_UY1VY0;
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break;
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case DRM_FORMAT_UYVY:
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format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
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JZ_IPU_D_FMT_YUV_Y1VY0U;
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break;
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case DRM_FORMAT_VYUY:
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format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
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JZ_IPU_D_FMT_YUV_Y1UY0V;
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break;
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case DRM_FORMAT_YUV411:
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format = JZ_IPU_D_FMT_IN_FMT_YUV411;
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break;
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case DRM_FORMAT_YUV420:
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format = JZ_IPU_D_FMT_IN_FMT_YUV420;
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break;
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case DRM_FORMAT_YUV422:
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format = JZ_IPU_D_FMT_IN_FMT_YUV422;
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break;
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case DRM_FORMAT_YUV444:
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format = JZ_IPU_D_FMT_IN_FMT_YUV444;
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break;
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default:
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WARN_ONCE(1, "Unsupported format");
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break;
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}
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/* Fix output to RGB888 */
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format |= JZ_IPU_D_FMT_OUT_FMT_RGB888;
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/* Set pixel format */
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regmap_write(ipu->map, JZ_REG_IPU_D_FMT, format);
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/* Set the output height/width/stride */
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regmap_write(ipu->map, JZ_REG_IPU_OUT_GS,
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((state->crtc_w * 4) << JZ_IPU_OUT_GS_W_LSB)
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| state->crtc_h << JZ_IPU_OUT_GS_H_LSB);
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regmap_write(ipu->map, JZ_REG_IPU_OUT_STRIDE, state->crtc_w * 4);
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if (finfo->is_yuv) {
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regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CSC_EN);
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/*
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* Offsets for Chroma/Luma.
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* y = source Y - LUMA,
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* u = source Cb - CHROMA,
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* v = source Cr - CHROMA
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*/
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regmap_write(ipu->map, JZ_REG_IPU_CSC_OFFSET,
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128 << JZ_IPU_CSC_OFFSET_CHROMA_LSB |
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0 << JZ_IPU_CSC_OFFSET_LUMA_LSB);
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/*
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* YUV422 to RGB conversion table.
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* R = C0 / 0x400 * y + C1 / 0x400 * v
|
|
* G = C0 / 0x400 * y - C2 / 0x400 * u - C3 / 0x400 * v
|
|
* B = C0 / 0x400 * y + C4 / 0x400 * u
|
|
*/
|
|
regmap_write(ipu->map, JZ_REG_IPU_CSC_C0_COEF, 0x4a8);
|
|
regmap_write(ipu->map, JZ_REG_IPU_CSC_C1_COEF, 0x662);
|
|
regmap_write(ipu->map, JZ_REG_IPU_CSC_C2_COEF, 0x191);
|
|
regmap_write(ipu->map, JZ_REG_IPU_CSC_C3_COEF, 0x341);
|
|
regmap_write(ipu->map, JZ_REG_IPU_CSC_C4_COEF, 0x811);
|
|
}
|
|
|
|
ctrl = 0;
|
|
|
|
/*
|
|
* Must set ZOOM_SEL before programming bicubic LUTs.
|
|
* If the IPU supports bicubic, we enable it unconditionally, since it
|
|
* can do anything bilinear can and more.
|
|
*/
|
|
if (ipu->soc_info->has_bicubic)
|
|
ctrl |= JZ_IPU_CTRL_ZOOM_SEL;
|
|
|
|
upscaling_w = ipu->num_w > ipu->denom_w;
|
|
if (upscaling_w)
|
|
ctrl |= JZ_IPU_CTRL_HSCALE;
|
|
|
|
if (ipu->num_w != 1 || ipu->denom_w != 1) {
|
|
if (!ipu->soc_info->has_bicubic && !upscaling_w)
|
|
coef_index |= (ipu->denom_w - 1) << 16;
|
|
else
|
|
coef_index |= (ipu->num_w - 1) << 16;
|
|
ctrl |= JZ_IPU_CTRL_HRSZ_EN;
|
|
}
|
|
|
|
upscaling_h = ipu->num_h > ipu->denom_h;
|
|
if (upscaling_h)
|
|
ctrl |= JZ_IPU_CTRL_VSCALE;
|
|
|
|
if (ipu->num_h != 1 || ipu->denom_h != 1) {
|
|
if (!ipu->soc_info->has_bicubic && !upscaling_h)
|
|
coef_index |= ipu->denom_h - 1;
|
|
else
|
|
coef_index |= ipu->num_h - 1;
|
|
ctrl |= JZ_IPU_CTRL_VRSZ_EN;
|
|
}
|
|
|
|
regmap_update_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_ZOOM_SEL |
|
|
JZ_IPU_CTRL_HRSZ_EN | JZ_IPU_CTRL_VRSZ_EN |
|
|
JZ_IPU_CTRL_HSCALE | JZ_IPU_CTRL_VSCALE, ctrl);
|
|
|
|
/* Set the LUT index register */
|
|
regmap_write(ipu->map, JZ_REG_IPU_RSZ_COEF_INDEX, coef_index);
|
|
|
|
if (ipu->num_w != 1 || ipu->denom_w != 1)
|
|
ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_HRSZ_COEF_LUT,
|
|
ipu->num_w, ipu->denom_w);
|
|
|
|
if (ipu->num_h != 1 || ipu->denom_h != 1)
|
|
ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_VRSZ_COEF_LUT,
|
|
ipu->num_h, ipu->denom_h);
|
|
|
|
/* Clear STATUS register */
|
|
regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
|
|
|
|
/* Start IPU */
|
|
regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
|
|
JZ_IPU_CTRL_RUN | JZ_IPU_CTRL_FM_IRQ_EN);
|
|
|
|
dev_dbg(ipu->dev, "Scaling %ux%u to %ux%u (%u:%u horiz, %u:%u vert)\n",
|
|
state->src_w >> 16, state->src_h >> 16,
|
|
state->crtc_w, state->crtc_h,
|
|
ipu->num_w, ipu->denom_w, ipu->num_h, ipu->denom_h);
|
|
}
|
|
|
|
static int ingenic_ipu_plane_atomic_check(struct drm_plane *plane,
|
|
struct drm_plane_state *state)
|
|
{
|
|
unsigned int num_w, denom_w, num_h, denom_h, xres, yres;
|
|
struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
|
|
struct drm_crtc *crtc = state->crtc ?: plane->state->crtc;
|
|
struct drm_crtc_state *crtc_state;
|
|
|
|
if (!crtc)
|
|
return 0;
|
|
|
|
crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
|
|
if (WARN_ON(!crtc_state))
|
|
return -EINVAL;
|
|
|
|
/* Request a full modeset if we are enabling or disabling the IPU. */
|
|
if (!plane->state->crtc ^ !state->crtc)
|
|
crtc_state->mode_changed = true;
|
|
|
|
if (!state->crtc ||
|
|
!crtc_state->mode.hdisplay || !crtc_state->mode.vdisplay)
|
|
return 0;
|
|
|
|
/* Plane must be fully visible */
|
|
if (state->crtc_x < 0 || state->crtc_y < 0 ||
|
|
state->crtc_x + state->crtc_w > crtc_state->mode.hdisplay ||
|
|
state->crtc_y + state->crtc_h > crtc_state->mode.vdisplay)
|
|
return -EINVAL;
|
|
|
|
/* Minimum size is 4x4 */
|
|
if ((state->src_w >> 16) < 4 || (state->src_h >> 16) < 4)
|
|
return -EINVAL;
|
|
|
|
/* Input and output lines must have an even number of pixels. */
|
|
if (((state->src_w >> 16) & 1) || (state->crtc_w & 1))
|
|
return -EINVAL;
|
|
|
|
if (!osd_changed(state, plane->state))
|
|
return 0;
|
|
|
|
crtc_state->mode_changed = true;
|
|
|
|
xres = state->src_w >> 16;
|
|
yres = state->src_h >> 16;
|
|
|
|
/* Adjust the coefficients until we find a valid configuration */
|
|
for (denom_w = xres, num_w = state->crtc_w;
|
|
num_w <= crtc_state->mode.hdisplay; num_w++)
|
|
if (!reduce_fraction(&num_w, &denom_w))
|
|
break;
|
|
if (num_w > crtc_state->mode.hdisplay)
|
|
return -EINVAL;
|
|
|
|
for (denom_h = yres, num_h = state->crtc_h;
|
|
num_h <= crtc_state->mode.vdisplay; num_h++)
|
|
if (!reduce_fraction(&num_h, &denom_h))
|
|
break;
|
|
if (num_h > crtc_state->mode.vdisplay)
|
|
return -EINVAL;
|
|
|
|
ipu->num_w = num_w;
|
|
ipu->num_h = num_h;
|
|
ipu->denom_w = denom_w;
|
|
ipu->denom_h = denom_h;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ingenic_ipu_plane_atomic_disable(struct drm_plane *plane,
|
|
struct drm_plane_state *old_state)
|
|
{
|
|
struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
|
|
|
|
regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_STOP);
|
|
regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN);
|
|
|
|
ingenic_drm_plane_disable(ipu->master, plane);
|
|
|
|
if (ipu->clk_enabled) {
|
|
clk_disable(ipu->clk);
|
|
ipu->clk_enabled = false;
|
|
}
|
|
}
|
|
|
|
static const struct drm_plane_helper_funcs ingenic_ipu_plane_helper_funcs = {
|
|
.atomic_update = ingenic_ipu_plane_atomic_update,
|
|
.atomic_check = ingenic_ipu_plane_atomic_check,
|
|
.atomic_disable = ingenic_ipu_plane_atomic_disable,
|
|
.prepare_fb = drm_gem_fb_prepare_fb,
|
|
};
|
|
|
|
static int
|
|
ingenic_ipu_plane_atomic_get_property(struct drm_plane *plane,
|
|
const struct drm_plane_state *state,
|
|
struct drm_property *property, u64 *val)
|
|
{
|
|
struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
|
|
|
|
if (property != ipu->sharpness_prop)
|
|
return -EINVAL;
|
|
|
|
*val = ipu->sharpness;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ingenic_ipu_plane_atomic_set_property(struct drm_plane *plane,
|
|
struct drm_plane_state *state,
|
|
struct drm_property *property, u64 val)
|
|
{
|
|
struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
|
|
struct drm_crtc_state *crtc_state;
|
|
|
|
if (property != ipu->sharpness_prop)
|
|
return -EINVAL;
|
|
|
|
ipu->sharpness = val;
|
|
|
|
if (state->crtc) {
|
|
crtc_state = drm_atomic_get_existing_crtc_state(state->state, state->crtc);
|
|
if (WARN_ON(!crtc_state))
|
|
return -EINVAL;
|
|
|
|
crtc_state->mode_changed = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct drm_plane_funcs ingenic_ipu_plane_funcs = {
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
|
.reset = drm_atomic_helper_plane_reset,
|
|
.destroy = drm_plane_cleanup,
|
|
|
|
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
|
|
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
|
|
|
|
.atomic_get_property = ingenic_ipu_plane_atomic_get_property,
|
|
.atomic_set_property = ingenic_ipu_plane_atomic_set_property,
|
|
};
|
|
|
|
static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
|
|
{
|
|
struct ingenic_ipu *ipu = arg;
|
|
struct drm_crtc *crtc = drm_crtc_from_index(ipu->drm, 0);
|
|
unsigned int dummy;
|
|
|
|
/* dummy read allows CPU to reconfigure IPU */
|
|
if (ipu->soc_info->manual_restart)
|
|
regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
|
|
|
|
/* ACK interrupt */
|
|
regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
|
|
|
|
/* Set previously cached addresses */
|
|
regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
|
|
regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
|
|
regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
|
|
|
|
/* Run IPU for the new frame */
|
|
if (ipu->soc_info->manual_restart)
|
|
regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
|
|
|
|
drm_crtc_handle_vblank(crtc);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static const struct regmap_config ingenic_ipu_regmap_config = {
|
|
.reg_bits = 32,
|
|
.val_bits = 32,
|
|
.reg_stride = 4,
|
|
|
|
.max_register = JZ_REG_IPU_OUT_PHY_T_ADDR,
|
|
};
|
|
|
|
static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
const struct soc_info *soc_info;
|
|
struct drm_device *drm = d;
|
|
struct drm_plane *plane;
|
|
struct ingenic_ipu *ipu;
|
|
void __iomem *base;
|
|
unsigned int sharpness_max;
|
|
int err, irq;
|
|
|
|
ipu = devm_kzalloc(dev, sizeof(*ipu), GFP_KERNEL);
|
|
if (!ipu)
|
|
return -ENOMEM;
|
|
|
|
soc_info = of_device_get_match_data(dev);
|
|
if (!soc_info) {
|
|
dev_err(dev, "Missing platform data\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ipu->dev = dev;
|
|
ipu->drm = drm;
|
|
ipu->master = master;
|
|
ipu->soc_info = soc_info;
|
|
|
|
base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(base)) {
|
|
dev_err(dev, "Failed to get memory resource\n");
|
|
return PTR_ERR(base);
|
|
}
|
|
|
|
ipu->map = devm_regmap_init_mmio(dev, base, &ingenic_ipu_regmap_config);
|
|
if (IS_ERR(ipu->map)) {
|
|
dev_err(dev, "Failed to create regmap\n");
|
|
return PTR_ERR(ipu->map);
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
ipu->clk = devm_clk_get(dev, "ipu");
|
|
if (IS_ERR(ipu->clk)) {
|
|
dev_err(dev, "Failed to get pixel clock\n");
|
|
return PTR_ERR(ipu->clk);
|
|
}
|
|
|
|
err = devm_request_irq(dev, irq, ingenic_ipu_irq_handler, 0,
|
|
dev_name(dev), ipu);
|
|
if (err) {
|
|
dev_err(dev, "Unable to request IRQ\n");
|
|
return err;
|
|
}
|
|
|
|
plane = &ipu->plane;
|
|
dev_set_drvdata(dev, plane);
|
|
|
|
drm_plane_helper_add(plane, &ingenic_ipu_plane_helper_funcs);
|
|
|
|
err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs,
|
|
soc_info->formats, soc_info->num_formats,
|
|
NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
|
|
if (err) {
|
|
dev_err(dev, "Failed to init plane: %i\n", err);
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Sharpness settings range is [0,32]
|
|
* 0 : nearest-neighbor
|
|
* 1 : bilinear
|
|
* 2 .. 32 : bicubic (translated to sharpness factor -0.25 .. -4.0)
|
|
*/
|
|
sharpness_max = soc_info->has_bicubic ? 32 : 1;
|
|
ipu->sharpness_prop = drm_property_create_range(drm, 0, "sharpness",
|
|
0, sharpness_max);
|
|
if (!ipu->sharpness_prop) {
|
|
dev_err(dev, "Unable to create sharpness property\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Default sharpness factor: -0.125 * 8 = -1.0 */
|
|
ipu->sharpness = soc_info->has_bicubic ? 8 : 1;
|
|
drm_object_attach_property(&plane->base, ipu->sharpness_prop,
|
|
ipu->sharpness);
|
|
|
|
err = clk_prepare(ipu->clk);
|
|
if (err) {
|
|
dev_err(dev, "Unable to prepare clock\n");
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ingenic_ipu_unbind(struct device *dev,
|
|
struct device *master, void *d)
|
|
{
|
|
struct ingenic_ipu *ipu = dev_get_drvdata(dev);
|
|
|
|
clk_unprepare(ipu->clk);
|
|
}
|
|
|
|
static const struct component_ops ingenic_ipu_ops = {
|
|
.bind = ingenic_ipu_bind,
|
|
.unbind = ingenic_ipu_unbind,
|
|
};
|
|
|
|
static int ingenic_ipu_probe(struct platform_device *pdev)
|
|
{
|
|
return component_add(&pdev->dev, &ingenic_ipu_ops);
|
|
}
|
|
|
|
static int ingenic_ipu_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &ingenic_ipu_ops);
|
|
return 0;
|
|
}
|
|
|
|
static const u32 jz4725b_ipu_formats[] = {
|
|
/*
|
|
* While officially supported, packed YUV 4:2:2 formats can cause
|
|
* random hardware crashes on JZ4725B under certain circumstances.
|
|
* It seems to happen with some specific resize ratios.
|
|
* Until a proper workaround or fix is found, disable these formats.
|
|
DRM_FORMAT_YUYV,
|
|
DRM_FORMAT_YVYU,
|
|
DRM_FORMAT_UYVY,
|
|
DRM_FORMAT_VYUY,
|
|
*/
|
|
DRM_FORMAT_YUV411,
|
|
DRM_FORMAT_YUV420,
|
|
DRM_FORMAT_YUV422,
|
|
DRM_FORMAT_YUV444,
|
|
};
|
|
|
|
static const struct soc_info jz4725b_soc_info = {
|
|
.formats = jz4725b_ipu_formats,
|
|
.num_formats = ARRAY_SIZE(jz4725b_ipu_formats),
|
|
.has_bicubic = false,
|
|
.manual_restart = true,
|
|
.set_coefs = jz4725b_set_coefs,
|
|
};
|
|
|
|
static const u32 jz4760_ipu_formats[] = {
|
|
DRM_FORMAT_XRGB1555,
|
|
DRM_FORMAT_XBGR1555,
|
|
DRM_FORMAT_RGB565,
|
|
DRM_FORMAT_BGR565,
|
|
DRM_FORMAT_XRGB8888,
|
|
DRM_FORMAT_XBGR8888,
|
|
DRM_FORMAT_YUYV,
|
|
DRM_FORMAT_YVYU,
|
|
DRM_FORMAT_UYVY,
|
|
DRM_FORMAT_VYUY,
|
|
DRM_FORMAT_YUV411,
|
|
DRM_FORMAT_YUV420,
|
|
DRM_FORMAT_YUV422,
|
|
DRM_FORMAT_YUV444,
|
|
DRM_FORMAT_XYUV8888,
|
|
};
|
|
|
|
static const struct soc_info jz4760_soc_info = {
|
|
.formats = jz4760_ipu_formats,
|
|
.num_formats = ARRAY_SIZE(jz4760_ipu_formats),
|
|
.has_bicubic = true,
|
|
.manual_restart = false,
|
|
.set_coefs = jz4760_set_coefs,
|
|
};
|
|
|
|
static const struct of_device_id ingenic_ipu_of_match[] = {
|
|
{ .compatible = "ingenic,jz4725b-ipu", .data = &jz4725b_soc_info },
|
|
{ .compatible = "ingenic,jz4760-ipu", .data = &jz4760_soc_info },
|
|
{ /* sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ingenic_ipu_of_match);
|
|
|
|
static struct platform_driver ingenic_ipu_driver = {
|
|
.driver = {
|
|
.name = "ingenic-ipu",
|
|
.of_match_table = ingenic_ipu_of_match,
|
|
},
|
|
.probe = ingenic_ipu_probe,
|
|
.remove = ingenic_ipu_remove,
|
|
};
|
|
|
|
struct platform_driver *ingenic_ipu_driver_ptr = &ingenic_ipu_driver;
|