OpenCloudOS-Kernel/drivers/mmc
Yangbo Lu 429d939c19 mmc: sdhci-of-esdhc: fix transfer mode register reading
The standard SD controller uses two 16-bit registers for
command sending.
0xC: Transfer Mode Register
0xE: Command Register

But the eSDHC controller uses one 32-bit register instead.
0xC: XFERTYPE

For Transfer Mode Register and Command Register writing,
the eSDHC driver will store Transfer Mode Register value in
a variable first. When Command Register writing happens,
driver will directly write a 32-bit value into XFERTYPE
register.

But for Transfer Mode Register reading, driver just returns
a actual value. This may cause issue for some read-modify-write
operations. We should make both reading and write on that variable
for Transfer Mode Register.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20200117063858.37296-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-01-20 12:10:24 +01:00
..
core mmc: core: limit probe clock frequency to configured f_max 2020-01-20 11:54:45 +01:00
host mmc: sdhci-of-esdhc: fix transfer mode register reading 2020-01-20 12:10:24 +01:00
Kconfig treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00