122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
/*
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* This file is part of wl18xx
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*
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* Copyright (C) 2011 Texas Instruments Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __WL18XX_CONF_H__
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#define __WL18XX_CONF_H__
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#define WL18XX_CONF_MAGIC 0x10e100ca
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#define WL18XX_CONF_VERSION (WLCORE_CONF_VERSION | 0x0006)
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#define WL18XX_CONF_MASK 0x0000ffff
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#define WL18XX_CONF_SIZE (WLCORE_CONF_SIZE + \
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sizeof(struct wl18xx_priv_conf))
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#define NUM_OF_CHANNELS_11_ABG 150
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#define NUM_OF_CHANNELS_11_P 7
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#define SRF_TABLE_LEN 16
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#define PIN_MUXING_SIZE 2
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#define WL18XX_TRACE_LOSS_GAPS_TX 10
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#define WL18XX_TRACE_LOSS_GAPS_RX 18
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struct wl18xx_mac_and_phy_params {
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u8 phy_standalone;
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u8 spare0;
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u8 enable_clpc;
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u8 enable_tx_low_pwr_on_siso_rdl;
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u8 auto_detect;
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u8 dedicated_fem;
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u8 low_band_component;
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/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
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u8 low_band_component_type;
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u8 high_band_component;
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/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
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u8 high_band_component_type;
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u8 number_of_assembled_ant2_4;
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u8 number_of_assembled_ant5;
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u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
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u8 external_pa_dc2dc;
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u8 tcxo_ldo_voltage;
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u8 xtal_itrim_val;
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u8 srf_state;
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u8 srf1[SRF_TABLE_LEN];
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u8 srf2[SRF_TABLE_LEN];
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u8 srf3[SRF_TABLE_LEN];
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u8 io_configuration;
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u8 sdio_configuration;
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u8 settings;
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u8 rx_profile;
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u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
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u8 pwr_limit_reference_11_abg;
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u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
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u8 pwr_limit_reference_11p;
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u8 spare1;
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u8 per_chan_bo_mode_11_abg[13];
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u8 per_chan_bo_mode_11_p[4];
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u8 primary_clock_setting_time;
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u8 clock_valid_on_wake_up;
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u8 secondary_clock_setting_time;
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u8 board_type;
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/* enable point saturation */
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u8 psat;
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/* low/medium/high Tx power in dBm for STA-HP BG */
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s8 low_power_val;
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s8 med_power_val;
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s8 high_power_val;
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s8 per_sub_band_tx_trace_loss[WL18XX_TRACE_LOSS_GAPS_TX];
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s8 per_sub_band_rx_trace_loss[WL18XX_TRACE_LOSS_GAPS_RX];
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u8 tx_rf_margin;
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/* low/medium/high Tx power in dBm for other role */
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s8 low_power_val_2nd;
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s8 med_power_val_2nd;
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s8 high_power_val_2nd;
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u8 padding[1];
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} __packed;
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enum wl18xx_ht_mode {
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/* Default - use MIMO, fallback to SISO20 */
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HT_MODE_DEFAULT = 0,
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/* Wide - use SISO40 */
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HT_MODE_WIDE = 1,
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/* Use SISO20 */
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HT_MODE_SISO20 = 2,
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};
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struct wl18xx_ht_settings {
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/* DEFAULT / WIDE / SISO20 */
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u8 mode;
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} __packed;
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struct wl18xx_priv_conf {
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/* Module params structures */
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struct wl18xx_ht_settings ht;
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/* this structure is copied wholesale to FW */
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struct wl18xx_mac_and_phy_params phy;
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} __packed;
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#endif /* __WL18XX_CONF_H__ */
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