579 lines
15 KiB
C
579 lines
15 KiB
C
/*
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* dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
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* and TURBOchannel PMAZ-A cards
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*
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* TURBOchannel changes by Harald Koerfgen
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* PMAZ-A support by David Airlie
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*
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* based on jazz_esp.c:
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* Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*
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* jazz_esp is based on David S. Miller's ESP driver and cyber_esp
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*
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* 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
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* Be warned the PMAZ-AA works currently as a single card.
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* Dont try to put multiple cards in one machine - They are
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* both detected but it may crash under high load garbling your
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* data.
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* 20001005 - Initialization fixes for 2.4.0-test9
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* Florian Lohoff <flo@rfc822.org>
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*
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* Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
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*/
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/blkdev.h>
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#include <linux/proc_fs.h>
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#include <linux/spinlock.h>
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#include <linux/stat.h>
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/dec/interrupts.h>
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#include <asm/dec/ioasic.h>
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#include <asm/dec/ioasic_addrs.h>
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#include <asm/dec/ioasic_ints.h>
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#include <asm/dec/machtype.h>
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#include <asm/dec/system.h>
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#include <asm/dec/tc.h>
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#define DEC_SCSI_SREG 0
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#define DEC_SCSI_DMAREG 0x40000
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#define DEC_SCSI_SRAM 0x80000
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#define DEC_SCSI_DIAG 0xC0000
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "NCR53C9x.h"
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
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static void dma_drain(struct NCR_ESP *esp);
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static int dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd *sp);
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static void dma_dump_state(struct NCR_ESP *esp);
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static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
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static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
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static void dma_ints_off(struct NCR_ESP *esp);
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static void dma_ints_on(struct NCR_ESP *esp);
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static int dma_irq_p(struct NCR_ESP *esp);
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static int dma_ports_p(struct NCR_ESP *esp);
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static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
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static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp);
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static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, struct scsi_cmnd * sp);
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static void dma_advance_sg(struct scsi_cmnd * sp);
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static void pmaz_dma_drain(struct NCR_ESP *esp);
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static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
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static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
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static void pmaz_dma_ints_off(struct NCR_ESP *esp);
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static void pmaz_dma_ints_on(struct NCR_ESP *esp);
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static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
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static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp);
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#define TC_ESP_RAM_SIZE 0x20000
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#define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
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#define ESP_NCMD 7
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#define TC_ESP_DMAR_MASK 0x1ffff
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#define TC_ESP_DMAR_WRITE 0x80000000
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#define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
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u32 esp_virt_buffer;
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int scsi_current_length;
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volatile unsigned char cmd_buffer[16];
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volatile unsigned char pmaz_cmd_buffer[16];
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/* This is where all commands are put
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* before they are trasfered to the ESP chip
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* via PIO.
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*/
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static irqreturn_t scsi_dma_merr_int(int, void *, struct pt_regs *);
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static irqreturn_t scsi_dma_err_int(int, void *, struct pt_regs *);
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static irqreturn_t scsi_dma_int(int, void *, struct pt_regs *);
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static int dec_esp_detect(struct scsi_host_template * tpnt);
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static int dec_esp_release(struct Scsi_Host *shost)
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{
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if (shost->irq)
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free_irq(shost->irq, NULL);
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if (shost->io_port && shost->n_io_port)
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release_region(shost->io_port, shost->n_io_port);
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scsi_unregister(shost);
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return 0;
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}
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static struct scsi_host_template driver_template = {
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.proc_name = "dec_esp",
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.proc_info = esp_proc_info,
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.name = "NCR53C94",
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.detect = dec_esp_detect,
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.slave_alloc = esp_slave_alloc,
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.slave_destroy = esp_slave_destroy,
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.release = dec_esp_release,
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.info = esp_info,
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.queuecommand = esp_queue,
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.eh_abort_handler = esp_abort,
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.eh_bus_reset_handler = esp_reset,
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.can_queue = 7,
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.this_id = 7,
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.sg_tablesize = SG_ALL,
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.cmd_per_lun = 1,
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.use_clustering = DISABLE_CLUSTERING,
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};
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#include "scsi_module.c"
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/***************************************************************** Detection */
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static int dec_esp_detect(struct scsi_host_template * tpnt)
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{
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struct NCR_ESP *esp;
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struct ConfigDev *esp_dev;
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int slot;
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unsigned long mem_start;
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if (IOASIC) {
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esp_dev = 0;
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esp = esp_allocate(tpnt, (void *) esp_dev);
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/* Do command transfer with programmed I/O */
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esp->do_pio_cmds = 1;
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/* Required functions */
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esp->dma_bytes_sent = &dma_bytes_sent;
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esp->dma_can_transfer = &dma_can_transfer;
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esp->dma_dump_state = &dma_dump_state;
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esp->dma_init_read = &dma_init_read;
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esp->dma_init_write = &dma_init_write;
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esp->dma_ints_off = &dma_ints_off;
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esp->dma_ints_on = &dma_ints_on;
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esp->dma_irq_p = &dma_irq_p;
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esp->dma_ports_p = &dma_ports_p;
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esp->dma_setup = &dma_setup;
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/* Optional functions */
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esp->dma_barrier = 0;
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esp->dma_drain = &dma_drain;
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esp->dma_invalidate = 0;
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esp->dma_irq_entry = 0;
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esp->dma_irq_exit = 0;
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esp->dma_poll = 0;
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esp->dma_reset = 0;
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esp->dma_led_off = 0;
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esp->dma_led_on = 0;
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/* virtual DMA functions */
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esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
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esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
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esp->dma_mmu_release_scsi_one = 0;
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esp->dma_mmu_release_scsi_sgl = 0;
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esp->dma_advance_sg = &dma_advance_sg;
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/* SCSI chip speed */
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esp->cfreq = 25000000;
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esp->dregs = 0;
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/* ESP register base */
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esp->eregs = (void *)CKSEG1ADDR(dec_kn_slot_base +
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IOASIC_SCSI);
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/* Set the command buffer */
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esp->esp_command = (volatile unsigned char *) cmd_buffer;
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/* get virtual dma address for command buffer */
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esp->esp_command_dvma = virt_to_phys(cmd_buffer);
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esp->irq = dec_interrupt[DEC_IRQ_ASC];
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esp->scsi_id = 7;
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/* Check for differential SCSI-bus */
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esp->diff = 0;
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esp_initialize(esp);
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if (request_irq(esp->irq, esp_intr, IRQF_DISABLED,
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"ncr53c94", esp->ehost))
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goto err_dealloc;
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if (request_irq(dec_interrupt[DEC_IRQ_ASC_MERR],
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scsi_dma_merr_int, IRQF_DISABLED,
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"ncr53c94 error", esp->ehost))
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goto err_free_irq;
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if (request_irq(dec_interrupt[DEC_IRQ_ASC_ERR],
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scsi_dma_err_int, IRQF_DISABLED,
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"ncr53c94 overrun", esp->ehost))
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goto err_free_irq_merr;
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if (request_irq(dec_interrupt[DEC_IRQ_ASC_DMA],
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scsi_dma_int, IRQF_DISABLED,
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"ncr53c94 dma", esp->ehost))
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goto err_free_irq_err;
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}
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if (TURBOCHANNEL) {
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while ((slot = search_tc_card("PMAZ-AA")) >= 0) {
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claim_tc_card(slot);
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esp_dev = 0;
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esp = esp_allocate(tpnt, (void *) esp_dev);
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mem_start = get_tc_base_addr(slot);
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/* Store base addr into esp struct */
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esp->slot = CPHYSADDR(mem_start);
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esp->dregs = 0;
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esp->eregs = (void *)CKSEG1ADDR(mem_start +
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DEC_SCSI_SREG);
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esp->do_pio_cmds = 1;
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/* Set the command buffer */
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esp->esp_command = (volatile unsigned char *) pmaz_cmd_buffer;
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/* get virtual dma address for command buffer */
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esp->esp_command_dvma = virt_to_phys(pmaz_cmd_buffer);
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esp->cfreq = get_tc_speed();
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esp->irq = get_tc_irq_nr(slot);
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/* Required functions */
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esp->dma_bytes_sent = &dma_bytes_sent;
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esp->dma_can_transfer = &dma_can_transfer;
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esp->dma_dump_state = &dma_dump_state;
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esp->dma_init_read = &pmaz_dma_init_read;
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esp->dma_init_write = &pmaz_dma_init_write;
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esp->dma_ints_off = &pmaz_dma_ints_off;
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esp->dma_ints_on = &pmaz_dma_ints_on;
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esp->dma_irq_p = &dma_irq_p;
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esp->dma_ports_p = &dma_ports_p;
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esp->dma_setup = &pmaz_dma_setup;
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/* Optional functions */
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esp->dma_barrier = 0;
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esp->dma_drain = &pmaz_dma_drain;
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esp->dma_invalidate = 0;
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esp->dma_irq_entry = 0;
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esp->dma_irq_exit = 0;
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esp->dma_poll = 0;
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esp->dma_reset = 0;
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esp->dma_led_off = 0;
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esp->dma_led_on = 0;
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esp->dma_mmu_get_scsi_one = pmaz_dma_mmu_get_scsi_one;
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esp->dma_mmu_get_scsi_sgl = 0;
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esp->dma_mmu_release_scsi_one = 0;
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esp->dma_mmu_release_scsi_sgl = 0;
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esp->dma_advance_sg = 0;
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if (request_irq(esp->irq, esp_intr, IRQF_DISABLED,
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"PMAZ_AA", esp->ehost)) {
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esp_deallocate(esp);
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release_tc_card(slot);
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continue;
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}
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esp->scsi_id = 7;
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esp->diff = 0;
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esp_initialize(esp);
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}
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}
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if(nesps) {
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printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
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esps_running = esps_in_use;
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return esps_in_use;
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}
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return 0;
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err_free_irq_err:
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free_irq(dec_interrupt[DEC_IRQ_ASC_ERR], scsi_dma_err_int);
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err_free_irq_merr:
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free_irq(dec_interrupt[DEC_IRQ_ASC_MERR], scsi_dma_merr_int);
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err_free_irq:
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free_irq(esp->irq, esp_intr);
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err_dealloc:
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esp_deallocate(esp);
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return 0;
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}
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/************************************************************* DMA Functions */
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static irqreturn_t scsi_dma_merr_int(int irq, void *dev_id, struct pt_regs *regs)
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{
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printk("Got unexpected SCSI DMA Interrupt! < ");
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printk("SCSI_DMA_MEMRDERR ");
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printk(">\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t scsi_dma_err_int(int irq, void *dev_id, struct pt_regs *regs)
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{
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/* empty */
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return IRQ_HANDLED;
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}
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static irqreturn_t scsi_dma_int(int irq, void *dev_id, struct pt_regs *regs)
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{
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u32 scsi_next_ptr;
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scsi_next_ptr = ioasic_read(IO_REG_SCSI_DMA_P);
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/* next page */
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scsi_next_ptr = (((scsi_next_ptr >> 3) + PAGE_SIZE) & PAGE_MASK) << 3;
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ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
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fast_iob();
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return IRQ_HANDLED;
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}
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
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{
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return fifo_count;
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}
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static void dma_drain(struct NCR_ESP *esp)
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{
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u32 nw, data0, data1, scsi_data_ptr;
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u16 *p;
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nw = ioasic_read(IO_REG_SCSI_SCR);
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/*
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* Is there something in the dma buffers left?
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*/
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if (nw) {
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scsi_data_ptr = ioasic_read(IO_REG_SCSI_DMA_P) >> 3;
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p = phys_to_virt(scsi_data_ptr);
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switch (nw) {
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case 1:
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data0 = ioasic_read(IO_REG_SCSI_SDR0);
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p[0] = data0 & 0xffff;
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break;
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case 2:
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data0 = ioasic_read(IO_REG_SCSI_SDR0);
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p[0] = data0 & 0xffff;
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p[1] = (data0 >> 16) & 0xffff;
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break;
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case 3:
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data0 = ioasic_read(IO_REG_SCSI_SDR0);
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data1 = ioasic_read(IO_REG_SCSI_SDR1);
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p[0] = data0 & 0xffff;
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p[1] = (data0 >> 16) & 0xffff;
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p[2] = data1 & 0xffff;
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break;
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default:
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printk("Strange: %d words in dma buffer left\n", nw);
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break;
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}
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}
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}
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static int dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd * sp)
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{
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return sp->SCp.this_residual;
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}
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static void dma_dump_state(struct NCR_ESP *esp)
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{
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}
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static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
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{
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u32 scsi_next_ptr, ioasic_ssr;
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unsigned long flags;
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if (vaddress & 3)
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panic("dec_esp.c: unable to handle partial word transfers, yet...");
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dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
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spin_lock_irqsave(&ioasic_ssr_lock, flags);
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fast_mb();
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ioasic_ssr = ioasic_read(IO_REG_SSR);
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ioasic_ssr &= ~IO_SSR_SCSI_DMA_EN;
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ioasic_write(IO_REG_SSR, ioasic_ssr);
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fast_wmb();
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ioasic_write(IO_REG_SCSI_SCR, 0);
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ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
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/* prepare for next page */
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scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
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ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
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ioasic_ssr |= (IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
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fast_wmb();
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ioasic_write(IO_REG_SSR, ioasic_ssr);
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fast_iob();
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spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
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}
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static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
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{
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u32 scsi_next_ptr, ioasic_ssr;
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unsigned long flags;
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if (vaddress & 3)
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panic("dec_esp.c: unable to handle partial word transfers, yet...");
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dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
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spin_lock_irqsave(&ioasic_ssr_lock, flags);
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fast_mb();
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ioasic_ssr = ioasic_read(IO_REG_SSR);
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ioasic_ssr &= ~(IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
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ioasic_write(IO_REG_SSR, ioasic_ssr);
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fast_wmb();
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ioasic_write(IO_REG_SCSI_SCR, 0);
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ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
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|
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/* prepare for next page */
|
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scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
|
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ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
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|
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ioasic_ssr |= IO_SSR_SCSI_DMA_EN;
|
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fast_wmb();
|
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ioasic_write(IO_REG_SSR, ioasic_ssr);
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|
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fast_iob();
|
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spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
|
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}
|
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|
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static void dma_ints_off(struct NCR_ESP *esp)
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{
|
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disable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
|
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}
|
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|
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static void dma_ints_on(struct NCR_ESP *esp)
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{
|
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enable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
|
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}
|
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static int dma_irq_p(struct NCR_ESP *esp)
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{
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return (esp->eregs->esp_status & ESP_STAT_INTR);
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}
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static int dma_ports_p(struct NCR_ESP *esp)
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{
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/*
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* FIXME: what's this good for?
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|
*/
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return 1;
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}
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|
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static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
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|
{
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|
/*
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* DMA_ST_WRITE means "move data from device to memory"
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* so when (write) is true, it actually means READ!
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|
*/
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|
if (write)
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dma_init_read(esp, addr, count);
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else
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dma_init_write(esp, addr, count);
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}
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|
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static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp)
|
|
{
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|
sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
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|
}
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|
|
|
static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, struct scsi_cmnd * sp)
|
|
{
|
|
int sz = sp->SCp.buffers_residual;
|
|
struct scatterlist *sg = sp->SCp.buffer;
|
|
|
|
while (sz >= 0) {
|
|
sg[sz].dma_address = page_to_phys(sg[sz].page) + sg[sz].offset;
|
|
sz--;
|
|
}
|
|
sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
|
|
}
|
|
|
|
static void dma_advance_sg(struct scsi_cmnd * sp)
|
|
{
|
|
sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
|
|
}
|
|
|
|
static void pmaz_dma_drain(struct NCR_ESP *esp)
|
|
{
|
|
memcpy(phys_to_virt(esp_virt_buffer),
|
|
(void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
|
|
ESP_TGT_DMA_SIZE),
|
|
scsi_current_length);
|
|
}
|
|
|
|
static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
|
|
{
|
|
volatile u32 *dmareg =
|
|
(volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
|
|
|
|
if (length > ESP_TGT_DMA_SIZE)
|
|
length = ESP_TGT_DMA_SIZE;
|
|
|
|
*dmareg = TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
|
|
|
|
iob();
|
|
|
|
esp_virt_buffer = vaddress;
|
|
scsi_current_length = length;
|
|
}
|
|
|
|
static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
|
|
{
|
|
volatile u32 *dmareg =
|
|
(volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
|
|
|
|
memcpy((void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
|
|
ESP_TGT_DMA_SIZE),
|
|
phys_to_virt(vaddress), length);
|
|
|
|
wmb();
|
|
*dmareg = TC_ESP_DMAR_WRITE | TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
|
|
|
|
iob();
|
|
}
|
|
|
|
static void pmaz_dma_ints_off(struct NCR_ESP *esp)
|
|
{
|
|
}
|
|
|
|
static void pmaz_dma_ints_on(struct NCR_ESP *esp)
|
|
{
|
|
}
|
|
|
|
static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
|
|
{
|
|
/*
|
|
* DMA_ST_WRITE means "move data from device to memory"
|
|
* so when (write) is true, it actually means READ!
|
|
*/
|
|
if (write)
|
|
pmaz_dma_init_read(esp, addr, count);
|
|
else
|
|
pmaz_dma_init_write(esp, addr, count);
|
|
}
|
|
|
|
static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp)
|
|
{
|
|
sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
|
|
}
|