224 lines
6.1 KiB
C
224 lines
6.1 KiB
C
/*
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* tps65912-irq.c -- TI TPS6591x
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*
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* Copyright 2011 Texas Instruments Inc.
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*
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* Author: Margarita Olaya <magi@slimlogic.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This driver is based on wm8350 implementation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/mfd/tps65912.h>
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static inline int irq_to_tps65912_irq(struct tps65912 *tps65912,
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int irq)
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{
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return irq - tps65912->irq_base;
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}
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/*
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* This is a threaded IRQ handler so can access I2C/SPI. Since the
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* IRQ handler explicitly clears the IRQ it handles the IRQ line
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* will be reasserted and the physical IRQ will be handled again if
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* another interrupt is asserted while we run - in the normal course
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* of events this is a rare occurrence so we save I2C/SPI reads. We're
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* also assuming that it's rare to get lots of interrupts firing
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* simultaneously so try to minimise I/O.
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*/
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static irqreturn_t tps65912_irq(int irq, void *irq_data)
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{
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struct tps65912 *tps65912 = irq_data;
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u32 irq_sts;
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u32 irq_mask;
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u8 reg;
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int i;
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tps65912->read(tps65912, TPS65912_INT_STS, 1, ®);
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irq_sts = reg;
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tps65912->read(tps65912, TPS65912_INT_STS2, 1, ®);
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irq_sts |= reg << 8;
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tps65912->read(tps65912, TPS65912_INT_STS3, 1, ®);
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irq_sts |= reg << 16;
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tps65912->read(tps65912, TPS65912_INT_STS4, 1, ®);
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irq_sts |= reg << 24;
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tps65912->read(tps65912, TPS65912_INT_MSK, 1, ®);
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irq_mask = reg;
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tps65912->read(tps65912, TPS65912_INT_MSK2, 1, ®);
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irq_mask |= reg << 8;
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tps65912->read(tps65912, TPS65912_INT_MSK3, 1, ®);
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irq_mask |= reg << 16;
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tps65912->read(tps65912, TPS65912_INT_MSK4, 1, ®);
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irq_mask |= reg << 24;
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irq_sts &= ~irq_mask;
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if (!irq_sts)
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return IRQ_NONE;
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for (i = 0; i < tps65912->irq_num; i++) {
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if (!(irq_sts & (1 << i)))
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continue;
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handle_nested_irq(tps65912->irq_base + i);
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}
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/* Write the STS register back to clear IRQs we handled */
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reg = irq_sts & 0xFF;
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irq_sts >>= 8;
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if (reg)
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tps65912->write(tps65912, TPS65912_INT_STS, 1, ®);
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reg = irq_sts & 0xFF;
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irq_sts >>= 8;
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if (reg)
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tps65912->write(tps65912, TPS65912_INT_STS2, 1, ®);
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reg = irq_sts & 0xFF;
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irq_sts >>= 8;
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if (reg)
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tps65912->write(tps65912, TPS65912_INT_STS3, 1, ®);
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reg = irq_sts & 0xFF;
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if (reg)
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tps65912->write(tps65912, TPS65912_INT_STS4, 1, ®);
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return IRQ_HANDLED;
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}
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static void tps65912_irq_lock(struct irq_data *data)
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{
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struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
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mutex_lock(&tps65912->irq_lock);
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}
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static void tps65912_irq_sync_unlock(struct irq_data *data)
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{
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struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
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u32 reg_mask;
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u8 reg;
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tps65912->read(tps65912, TPS65912_INT_MSK, 1, ®);
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reg_mask = reg;
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tps65912->read(tps65912, TPS65912_INT_MSK2, 1, ®);
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reg_mask |= reg << 8;
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tps65912->read(tps65912, TPS65912_INT_MSK3, 1, ®);
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reg_mask |= reg << 16;
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tps65912->read(tps65912, TPS65912_INT_MSK4, 1, ®);
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reg_mask |= reg << 24;
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if (tps65912->irq_mask != reg_mask) {
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reg = tps65912->irq_mask & 0xFF;
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tps65912->write(tps65912, TPS65912_INT_MSK, 1, ®);
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reg = tps65912->irq_mask >> 8 & 0xFF;
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tps65912->write(tps65912, TPS65912_INT_MSK2, 1, ®);
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reg = tps65912->irq_mask >> 16 & 0xFF;
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tps65912->write(tps65912, TPS65912_INT_MSK3, 1, ®);
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reg = tps65912->irq_mask >> 24 & 0xFF;
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tps65912->write(tps65912, TPS65912_INT_MSK4, 1, ®);
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}
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mutex_unlock(&tps65912->irq_lock);
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}
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static void tps65912_irq_enable(struct irq_data *data)
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{
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struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
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tps65912->irq_mask &= ~(1 << irq_to_tps65912_irq(tps65912, data->irq));
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}
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static void tps65912_irq_disable(struct irq_data *data)
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{
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struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
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tps65912->irq_mask |= (1 << irq_to_tps65912_irq(tps65912, data->irq));
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}
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static struct irq_chip tps65912_irq_chip = {
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.name = "tps65912",
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.irq_bus_lock = tps65912_irq_lock,
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.irq_bus_sync_unlock = tps65912_irq_sync_unlock,
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.irq_disable = tps65912_irq_disable,
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.irq_enable = tps65912_irq_enable,
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};
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int tps65912_irq_init(struct tps65912 *tps65912, int irq,
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struct tps65912_platform_data *pdata)
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{
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int ret, cur_irq;
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int flags = IRQF_ONESHOT;
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u8 reg;
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if (!irq) {
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dev_warn(tps65912->dev, "No interrupt support, no core IRQ\n");
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return 0;
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}
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if (!pdata || !pdata->irq_base) {
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dev_warn(tps65912->dev, "No interrupt support, no IRQ base\n");
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return 0;
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}
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/* Clear unattended interrupts */
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tps65912->read(tps65912, TPS65912_INT_STS, 1, ®);
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tps65912->write(tps65912, TPS65912_INT_STS, 1, ®);
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tps65912->read(tps65912, TPS65912_INT_STS2, 1, ®);
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tps65912->write(tps65912, TPS65912_INT_STS2, 1, ®);
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tps65912->read(tps65912, TPS65912_INT_STS3, 1, ®);
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tps65912->write(tps65912, TPS65912_INT_STS3, 1, ®);
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tps65912->read(tps65912, TPS65912_INT_STS4, 1, ®);
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tps65912->write(tps65912, TPS65912_INT_STS4, 1, ®);
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/* Mask top level interrupts */
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tps65912->irq_mask = 0xFFFFFFFF;
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mutex_init(&tps65912->irq_lock);
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tps65912->chip_irq = irq;
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tps65912->irq_base = pdata->irq_base;
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tps65912->irq_num = TPS65912_NUM_IRQ;
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/* Register with genirq */
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for (cur_irq = tps65912->irq_base;
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cur_irq < tps65912->irq_num + tps65912->irq_base;
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cur_irq++) {
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irq_set_chip_data(cur_irq, tps65912);
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irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip,
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handle_edge_irq);
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irq_set_nested_thread(cur_irq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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* and will set them noprobe when we do so. */
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#ifdef CONFIG_ARM
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set_irq_flags(cur_irq, IRQF_VALID);
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#else
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irq_set_noprobe(cur_irq);
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#endif
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}
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ret = request_threaded_irq(irq, NULL, tps65912_irq, flags,
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"tps65912", tps65912);
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irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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if (ret != 0)
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dev_err(tps65912->dev, "Failed to request IRQ: %d\n", ret);
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return ret;
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}
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int tps65912_irq_exit(struct tps65912 *tps65912)
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{
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free_irq(tps65912->chip_irq, tps65912);
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return 0;
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}
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