382 lines
8.8 KiB
C
382 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de>
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*
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* Driver for Alcor Micro AU6601 and AU6621 controllers
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/alcor_pci.h>
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#define DRV_NAME_ALCOR_PCI "alcor_pci"
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static DEFINE_IDA(alcor_pci_idr);
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static struct mfd_cell alcor_pci_cells[] = {
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[ALCOR_SD_CARD] = {
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.name = DRV_NAME_ALCOR_PCI_SDMMC,
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},
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[ALCOR_MS_CARD] = {
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.name = DRV_NAME_ALCOR_PCI_MS,
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},
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};
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static const struct alcor_dev_cfg alcor_cfg = {
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.dma = 0,
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};
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static const struct alcor_dev_cfg au6621_cfg = {
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.dma = 1,
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};
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static const struct alcor_dev_cfg au6625_cfg = {
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.dma = 0,
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};
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static const struct pci_device_id pci_ids[] = {
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{ PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6601),
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.driver_data = (kernel_ulong_t)&alcor_cfg },
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{ PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6621),
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.driver_data = (kernel_ulong_t)&au6621_cfg },
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{ PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6625),
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.driver_data = (kernel_ulong_t)&au6625_cfg },
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{},
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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void alcor_write8(struct alcor_pci_priv *priv, u8 val, unsigned int addr)
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{
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writeb(val, priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_write8);
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void alcor_write16(struct alcor_pci_priv *priv, u16 val, unsigned int addr)
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{
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writew(val, priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_write16);
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void alcor_write32(struct alcor_pci_priv *priv, u32 val, unsigned int addr)
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{
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writel(val, priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_write32);
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void alcor_write32be(struct alcor_pci_priv *priv, u32 val, unsigned int addr)
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{
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iowrite32be(val, priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_write32be);
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u8 alcor_read8(struct alcor_pci_priv *priv, unsigned int addr)
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{
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return readb(priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_read8);
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u32 alcor_read32(struct alcor_pci_priv *priv, unsigned int addr)
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{
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return readl(priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_read32);
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u32 alcor_read32be(struct alcor_pci_priv *priv, unsigned int addr)
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{
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return ioread32be(priv->iobase + addr);
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}
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EXPORT_SYMBOL_GPL(alcor_read32be);
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static int alcor_pci_find_cap_offset(struct alcor_pci_priv *priv,
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struct pci_dev *pci)
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{
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int where;
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u8 val8;
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u32 val32;
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where = ALCOR_CAP_START_OFFSET;
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pci_read_config_byte(pci, where, &val8);
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if (!val8)
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return 0;
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where = (int)val8;
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while (1) {
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pci_read_config_dword(pci, where, &val32);
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if (val32 == 0xffffffff) {
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dev_dbg(priv->dev, "find_cap_offset invalid value %x.\n",
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val32);
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return 0;
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}
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if ((val32 & 0xff) == 0x10) {
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dev_dbg(priv->dev, "pcie cap offset: %x\n", where);
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return where;
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}
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if ((val32 & 0xff00) == 0x00) {
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dev_dbg(priv->dev, "pci_find_cap_offset invalid value %x.\n",
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val32);
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break;
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}
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where = (int)((val32 >> 8) & 0xff);
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}
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return 0;
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}
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static void alcor_pci_init_check_aspm(struct alcor_pci_priv *priv)
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{
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struct pci_dev *pci;
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int where;
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u32 val32;
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priv->pdev_cap_off = alcor_pci_find_cap_offset(priv, priv->pdev);
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/*
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* A device might be attached to root complex directly and
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* priv->parent_pdev will be NULL. In this case we don't check its
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* capability and disable ASPM completely.
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*/
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if (priv->parent_pdev)
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priv->parent_cap_off = alcor_pci_find_cap_offset(priv,
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priv->parent_pdev);
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if ((priv->pdev_cap_off == 0) || (priv->parent_cap_off == 0)) {
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dev_dbg(priv->dev, "pci_cap_off: %x, parent_cap_off: %x\n",
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priv->pdev_cap_off, priv->parent_cap_off);
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return;
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}
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/* link capability */
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pci = priv->pdev;
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where = priv->pdev_cap_off + ALCOR_PCIE_LINK_CAP_OFFSET;
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pci_read_config_dword(pci, where, &val32);
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priv->pdev_aspm_cap = (u8)(val32 >> 10) & 0x03;
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pci = priv->parent_pdev;
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where = priv->parent_cap_off + ALCOR_PCIE_LINK_CAP_OFFSET;
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pci_read_config_dword(pci, where, &val32);
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priv->parent_aspm_cap = (u8)(val32 >> 10) & 0x03;
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if (priv->pdev_aspm_cap != priv->parent_aspm_cap) {
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u8 aspm_cap;
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dev_dbg(priv->dev, "pdev_aspm_cap: %x, parent_aspm_cap: %x\n",
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priv->pdev_aspm_cap, priv->parent_aspm_cap);
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aspm_cap = priv->pdev_aspm_cap & priv->parent_aspm_cap;
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priv->pdev_aspm_cap = aspm_cap;
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priv->parent_aspm_cap = aspm_cap;
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}
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dev_dbg(priv->dev, "ext_config_dev_aspm: %x, pdev_aspm_cap: %x\n",
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priv->ext_config_dev_aspm, priv->pdev_aspm_cap);
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priv->ext_config_dev_aspm &= priv->pdev_aspm_cap;
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}
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static void alcor_pci_aspm_ctrl(struct alcor_pci_priv *priv, u8 aspm_enable)
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{
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struct pci_dev *pci;
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u8 aspm_ctrl, i;
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int where;
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u32 val32;
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if ((!priv->pdev_cap_off) || (!priv->parent_cap_off)) {
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dev_dbg(priv->dev, "pci_cap_off: %x, parent_cap_off: %x\n",
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priv->pdev_cap_off, priv->parent_cap_off);
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return;
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}
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if (!priv->pdev_aspm_cap)
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return;
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aspm_ctrl = 0;
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if (aspm_enable) {
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aspm_ctrl = priv->ext_config_dev_aspm;
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if (!aspm_ctrl) {
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dev_dbg(priv->dev, "aspm_ctrl == 0\n");
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return;
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}
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}
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for (i = 0; i < 2; i++) {
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if (i) {
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pci = priv->parent_pdev;
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where = priv->parent_cap_off
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+ ALCOR_PCIE_LINK_CTRL_OFFSET;
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} else {
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pci = priv->pdev;
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where = priv->pdev_cap_off
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+ ALCOR_PCIE_LINK_CTRL_OFFSET;
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}
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pci_read_config_dword(pci, where, &val32);
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val32 &= (~0x03);
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val32 |= (aspm_ctrl & priv->pdev_aspm_cap);
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pci_write_config_byte(pci, where, (u8)val32);
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}
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}
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static inline void alcor_mask_sd_irqs(struct alcor_pci_priv *priv)
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{
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alcor_write32(priv, 0, AU6601_REG_INT_ENABLE);
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}
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static inline void alcor_unmask_sd_irqs(struct alcor_pci_priv *priv)
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{
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alcor_write32(priv, AU6601_INT_CMD_MASK | AU6601_INT_DATA_MASK |
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AU6601_INT_CARD_INSERT | AU6601_INT_CARD_REMOVE |
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AU6601_INT_OVER_CURRENT_ERR,
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AU6601_REG_INT_ENABLE);
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}
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static inline void alcor_mask_ms_irqs(struct alcor_pci_priv *priv)
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{
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alcor_write32(priv, 0, AU6601_MS_INT_ENABLE);
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}
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static inline void alcor_unmask_ms_irqs(struct alcor_pci_priv *priv)
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{
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alcor_write32(priv, 0x3d00fa, AU6601_MS_INT_ENABLE);
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}
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static int alcor_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct alcor_dev_cfg *cfg;
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struct alcor_pci_priv *priv;
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int ret, i, bar = 0;
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cfg = (void *)ent->driver_data;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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ret = ida_simple_get(&alcor_pci_idr, 0, 0, GFP_KERNEL);
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if (ret < 0)
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return ret;
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priv->id = ret;
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priv->pdev = pdev;
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priv->parent_pdev = pdev->bus->self;
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priv->dev = &pdev->dev;
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priv->cfg = cfg;
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priv->irq = pdev->irq;
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ret = pci_request_regions(pdev, DRV_NAME_ALCOR_PCI);
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if (ret) {
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dev_err(&pdev->dev, "Cannot request region\n");
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return -ENOMEM;
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}
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if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
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dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
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ret = -ENODEV;
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goto error_release_regions;
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}
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priv->iobase = pcim_iomap(pdev, bar, 0);
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if (!priv->iobase) {
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ret = -ENOMEM;
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goto error_release_regions;
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}
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/* make sure irqs are disabled */
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alcor_write32(priv, 0, AU6601_REG_INT_ENABLE);
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alcor_write32(priv, 0, AU6601_MS_INT_ENABLE);
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ret = dma_set_mask_and_coherent(priv->dev, AU6601_SDMA_MASK);
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if (ret) {
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dev_err(priv->dev, "Failed to set DMA mask\n");
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goto error_release_regions;
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}
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pci_set_master(pdev);
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pci_set_drvdata(pdev, priv);
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alcor_pci_init_check_aspm(priv);
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for (i = 0; i < ARRAY_SIZE(alcor_pci_cells); i++) {
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alcor_pci_cells[i].platform_data = priv;
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alcor_pci_cells[i].pdata_size = sizeof(*priv);
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}
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ret = mfd_add_devices(&pdev->dev, priv->id, alcor_pci_cells,
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ARRAY_SIZE(alcor_pci_cells), NULL, 0, NULL);
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if (ret < 0)
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goto error_release_regions;
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alcor_pci_aspm_ctrl(priv, 0);
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return 0;
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error_release_regions:
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pci_release_regions(pdev);
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return ret;
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}
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static void alcor_pci_remove(struct pci_dev *pdev)
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{
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struct alcor_pci_priv *priv;
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priv = pci_get_drvdata(pdev);
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alcor_pci_aspm_ctrl(priv, 1);
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mfd_remove_devices(&pdev->dev);
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ida_simple_remove(&alcor_pci_idr, priv->id);
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pci_release_regions(pdev);
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pci_set_drvdata(pdev, NULL);
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}
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#ifdef CONFIG_PM_SLEEP
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static int alcor_suspend(struct device *dev)
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{
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struct alcor_pci_priv *priv = dev_get_drvdata(dev);
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alcor_pci_aspm_ctrl(priv, 1);
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return 0;
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}
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static int alcor_resume(struct device *dev)
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{
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struct alcor_pci_priv *priv = dev_get_drvdata(dev);
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alcor_pci_aspm_ctrl(priv, 0);
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(alcor_pci_pm_ops, alcor_suspend, alcor_resume);
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static struct pci_driver alcor_driver = {
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.name = DRV_NAME_ALCOR_PCI,
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.id_table = pci_ids,
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.probe = alcor_pci_probe,
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.remove = alcor_pci_remove,
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.driver = {
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.pm = &alcor_pci_pm_ops
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},
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};
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module_pci_driver(alcor_driver);
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MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
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MODULE_DESCRIPTION("PCI driver for Alcor Micro AU6601 Secure Digital Host Controller Interface");
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MODULE_LICENSE("GPL");
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