88 lines
2.0 KiB
C
88 lines
2.0 KiB
C
/*
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* linux/arch/arm/mm/nommu.c
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*
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* ARM uCLinux supporting functions.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/pagemap.h>
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#include <linux/bootmem.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/mach/arch.h>
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#include "mm.h"
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extern void _stext, __data_start, _end;
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/*
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* Reserve the various regions of node 0
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*/
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void __init reserve_node_zero(pg_data_t *pgdat)
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{
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/*
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* Register the kernel text and data with bootmem.
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* Note that this can only be in node 0.
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*/
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#ifdef CONFIG_XIP_KERNEL
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reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start,
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BOOTMEM_DEFAULT);
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#else
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reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext,
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BOOTMEM_DEFAULT);
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#endif
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/*
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* Register the exception vector page.
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* some architectures which the DRAM is the exception vector to trap,
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* alloc_page breaks with error, although it is not NULL, but "0."
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*/
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reserve_bootmem_node(pgdat, CONFIG_VECTORS_BASE, PAGE_SIZE,
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BOOTMEM_DEFAULT);
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}
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/*
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* paging_init() sets up the page tables, initialises the zone memory
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* maps, and sets up the zero page, bad page and bad page tables.
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*/
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void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
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{
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bootmem_init(mi);
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}
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/*
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* We don't need to do anything here for nommu machines.
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*/
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void setup_mm_for_reboot(char mode)
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{
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}
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void flush_dcache_page(struct page *page)
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{
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__cpuc_flush_dcache_page(page_address(page));
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}
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EXPORT_SYMBOL(flush_dcache_page);
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void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset,
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size_t size, unsigned int mtype)
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{
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if (pfn >= (0x100000000ULL >> PAGE_SHIFT))
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return NULL;
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return (void __iomem *) (offset + (pfn << PAGE_SHIFT));
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}
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EXPORT_SYMBOL(__arm_ioremap_pfn);
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void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size,
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unsigned int mtype)
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{
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return (void __iomem *)phys_addr;
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}
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EXPORT_SYMBOL(__arm_ioremap);
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void __iounmap(volatile void __iomem *addr)
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{
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}
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EXPORT_SYMBOL(__iounmap);
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