634 lines
17 KiB
C
634 lines
17 KiB
C
/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/vmalloc.h>
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#include "hfi.h"
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#include "twsi.h"
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/*
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* QSFP support for hfi driver, using "Two Wire Serial Interface" driver
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* in twsi.c
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*/
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#define I2C_MAX_RETRY 4
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/*
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* Raw i2c write. No set-up or lock checking.
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*/
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static int __i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
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int offset, void *bp, int len)
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{
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struct hfi1_devdata *dd = ppd->dd;
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int ret, cnt;
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u8 *buff = bp;
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cnt = 0;
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while (cnt < len) {
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int wlen = len - cnt;
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ret = hfi1_twsi_blk_wr(dd, target, i2c_addr, offset,
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buff + cnt, wlen);
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if (ret) {
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/* hfi1_twsi_blk_wr() 1 for error, else 0 */
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return -EIO;
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}
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offset += wlen;
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cnt += wlen;
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}
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/* Must wait min 20us between qsfp i2c transactions */
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udelay(20);
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return cnt;
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}
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/*
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* Caller must hold the i2c chain resource.
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*/
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int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, int offset,
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void *bp, int len)
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{
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int ret;
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if (!check_chip_resource(ppd->dd, i2c_target(target), __func__))
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return -EACCES;
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/* make sure the TWSI bus is in a sane state */
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ret = hfi1_twsi_reset(ppd->dd, target);
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if (ret) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"I2C chain %d write interface reset failed\n",
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target);
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return ret;
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}
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return __i2c_write(ppd, target, i2c_addr, offset, bp, len);
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}
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/*
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* Raw i2c read. No set-up or lock checking.
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*/
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static int __i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
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int offset, void *bp, int len)
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{
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struct hfi1_devdata *dd = ppd->dd;
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int ret, cnt, pass = 0;
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int orig_offset = offset;
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cnt = 0;
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while (cnt < len) {
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int rlen = len - cnt;
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ret = hfi1_twsi_blk_rd(dd, target, i2c_addr, offset,
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bp + cnt, rlen);
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/* Some QSFP's fail first try. Retry as experiment */
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if (ret && cnt == 0 && ++pass < I2C_MAX_RETRY)
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continue;
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if (ret) {
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/* hfi1_twsi_blk_rd() 1 for error, else 0 */
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ret = -EIO;
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goto exit;
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}
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offset += rlen;
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cnt += rlen;
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}
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ret = cnt;
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exit:
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if (ret < 0) {
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hfi1_dev_porterr(dd, ppd->port,
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"I2C chain %d read failed, addr 0x%x, offset 0x%x, len %d\n",
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target, i2c_addr, orig_offset, len);
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}
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/* Must wait min 20us between qsfp i2c transactions */
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udelay(20);
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return ret;
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}
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/*
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* Caller must hold the i2c chain resource.
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*/
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int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, int offset,
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void *bp, int len)
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{
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int ret;
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if (!check_chip_resource(ppd->dd, i2c_target(target), __func__))
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return -EACCES;
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/* make sure the TWSI bus is in a sane state */
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ret = hfi1_twsi_reset(ppd->dd, target);
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if (ret) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"I2C chain %d read interface reset failed\n",
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target);
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return ret;
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}
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return __i2c_read(ppd, target, i2c_addr, offset, bp, len);
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}
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/*
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* Write page n, offset m of QSFP memory as defined by SFF 8636
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* by writing @addr = ((256 * n) + m)
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*
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* Caller must hold the i2c chain resource.
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*/
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int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
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int len)
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{
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int count = 0;
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int offset;
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int nwrite;
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int ret;
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u8 page;
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if (!check_chip_resource(ppd->dd, i2c_target(target), __func__))
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return -EACCES;
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/* make sure the TWSI bus is in a sane state */
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ret = hfi1_twsi_reset(ppd->dd, target);
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if (ret) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"QSFP chain %d write interface reset failed\n",
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target);
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return ret;
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}
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while (count < len) {
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/*
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* Set the qsfp page based on a zero-based address
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* and a page size of QSFP_PAGESIZE bytes.
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*/
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page = (u8)(addr / QSFP_PAGESIZE);
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ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE,
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QSFP_PAGE_SELECT_BYTE_OFFS, &page, 1);
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if (ret != 1) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"QSFP chain %d can't write QSFP_PAGE_SELECT_BYTE: %d\n",
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target, ret);
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ret = -EIO;
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break;
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}
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offset = addr % QSFP_PAGESIZE;
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nwrite = len - count;
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/* truncate write to boundary if crossing boundary */
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if (((addr % QSFP_RW_BOUNDARY) + nwrite) > QSFP_RW_BOUNDARY)
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nwrite = QSFP_RW_BOUNDARY - (addr % QSFP_RW_BOUNDARY);
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ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE,
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offset, bp + count, nwrite);
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if (ret <= 0) /* stop on error or nothing written */
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break;
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count += ret;
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addr += ret;
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}
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if (ret < 0)
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return ret;
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return count;
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}
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/*
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* Perform a stand-alone single QSFP write. Acquire the resource, do the
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* read, then release the resource.
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*/
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int one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
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int len)
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{
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struct hfi1_devdata *dd = ppd->dd;
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u32 resource = qsfp_resource(dd);
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int ret;
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ret = acquire_chip_resource(dd, resource, QSFP_WAIT);
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if (ret)
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return ret;
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ret = qsfp_write(ppd, target, addr, bp, len);
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release_chip_resource(dd, resource);
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return ret;
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}
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/*
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* Access page n, offset m of QSFP memory as defined by SFF 8636
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* by reading @addr = ((256 * n) + m)
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*
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* Caller must hold the i2c chain resource.
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*/
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int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
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int len)
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{
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int count = 0;
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int offset;
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int nread;
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int ret;
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u8 page;
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if (!check_chip_resource(ppd->dd, i2c_target(target), __func__))
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return -EACCES;
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/* make sure the TWSI bus is in a sane state */
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ret = hfi1_twsi_reset(ppd->dd, target);
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if (ret) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"QSFP chain %d read interface reset failed\n",
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target);
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return ret;
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}
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while (count < len) {
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/*
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* Set the qsfp page based on a zero-based address
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* and a page size of QSFP_PAGESIZE bytes.
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*/
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page = (u8)(addr / QSFP_PAGESIZE);
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ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE,
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QSFP_PAGE_SELECT_BYTE_OFFS, &page, 1);
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if (ret != 1) {
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hfi1_dev_porterr(ppd->dd, ppd->port,
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"QSFP chain %d can't write QSFP_PAGE_SELECT_BYTE: %d\n",
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target, ret);
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ret = -EIO;
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break;
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}
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offset = addr % QSFP_PAGESIZE;
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nread = len - count;
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/* truncate read to boundary if crossing boundary */
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if (((addr % QSFP_RW_BOUNDARY) + nread) > QSFP_RW_BOUNDARY)
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nread = QSFP_RW_BOUNDARY - (addr % QSFP_RW_BOUNDARY);
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/* QSFPs require a 5-10msec delay after write operations */
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mdelay(5);
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ret = __i2c_read(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE,
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offset, bp + count, nread);
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if (ret <= 0) /* stop on error or nothing read */
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break;
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count += ret;
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addr += ret;
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}
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if (ret < 0)
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return ret;
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return count;
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}
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/*
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* Perform a stand-alone single QSFP read. Acquire the resource, do the
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* read, then release the resource.
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*/
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int one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
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int len)
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{
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struct hfi1_devdata *dd = ppd->dd;
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u32 resource = qsfp_resource(dd);
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int ret;
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ret = acquire_chip_resource(dd, resource, QSFP_WAIT);
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if (ret)
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return ret;
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ret = qsfp_read(ppd, target, addr, bp, len);
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release_chip_resource(dd, resource);
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return ret;
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}
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/*
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* This function caches the QSFP memory range in 128 byte chunks.
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* As an example, the next byte after address 255 is byte 128 from
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* upper page 01H (if existing) rather than byte 0 from lower page 00H.
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* Access page n, offset m of QSFP memory as defined by SFF 8636
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* in the cache by reading byte ((128 * n) + m)
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* The calls to qsfp_{read,write} in this function correctly handle the
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* address map difference between this mapping and the mapping implemented
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* by those functions
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*
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* The caller must be holding the QSFP i2c chain resource.
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*/
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int refresh_qsfp_cache(struct hfi1_pportdata *ppd, struct qsfp_data *cp)
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{
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u32 target = ppd->dd->hfi1_id;
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int ret;
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unsigned long flags;
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u8 *cache = &cp->cache[0];
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/* ensure sane contents on invalid reads, for cable swaps */
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memset(cache, 0, (QSFP_MAX_NUM_PAGES * 128));
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spin_lock_irqsave(&ppd->qsfp_info.qsfp_lock, flags);
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ppd->qsfp_info.cache_valid = 0;
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spin_unlock_irqrestore(&ppd->qsfp_info.qsfp_lock, flags);
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if (!qsfp_mod_present(ppd)) {
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ret = -ENODEV;
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goto bail;
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}
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ret = qsfp_read(ppd, target, 0, cache, QSFP_PAGESIZE);
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if (ret != QSFP_PAGESIZE) {
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dd_dev_info(ppd->dd,
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"%s: Page 0 read failed, expected %d, got %d\n",
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__func__, QSFP_PAGESIZE, ret);
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goto bail;
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}
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/* Is paging enabled? */
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if (!(cache[2] & 4)) {
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/* Paging enabled, page 03 required */
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if ((cache[195] & 0xC0) == 0xC0) {
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/* all */
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ret = qsfp_read(ppd, target, 384, cache + 256, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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ret = qsfp_read(ppd, target, 640, cache + 384, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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ret = qsfp_read(ppd, target, 896, cache + 512, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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} else if ((cache[195] & 0x80) == 0x80) {
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/* only page 2 and 3 */
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ret = qsfp_read(ppd, target, 640, cache + 384, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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ret = qsfp_read(ppd, target, 896, cache + 512, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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} else if ((cache[195] & 0x40) == 0x40) {
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/* only page 1 and 3 */
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ret = qsfp_read(ppd, target, 384, cache + 256, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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ret = qsfp_read(ppd, target, 896, cache + 512, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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} else {
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/* only page 3 */
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ret = qsfp_read(ppd, target, 896, cache + 512, 128);
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if (ret <= 0 || ret != 128) {
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dd_dev_info(ppd->dd, "%s failed\n", __func__);
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goto bail;
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}
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}
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}
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spin_lock_irqsave(&ppd->qsfp_info.qsfp_lock, flags);
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ppd->qsfp_info.cache_valid = 1;
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ppd->qsfp_info.cache_refresh_required = 0;
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spin_unlock_irqrestore(&ppd->qsfp_info.qsfp_lock, flags);
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return 0;
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bail:
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memset(cache, 0, (QSFP_MAX_NUM_PAGES * 128));
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return ret;
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}
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const char * const hfi1_qsfp_devtech[16] = {
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"850nm VCSEL", "1310nm VCSEL", "1550nm VCSEL", "1310nm FP",
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"1310nm DFB", "1550nm DFB", "1310nm EML", "1550nm EML",
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"Cu Misc", "1490nm DFB", "Cu NoEq", "Cu Eq",
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"Undef", "Cu Active BothEq", "Cu FarEq", "Cu NearEq"
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};
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#define QSFP_DUMP_CHUNK 16 /* Holds longest string */
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#define QSFP_DEFAULT_HDR_CNT 224
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#define QSFP_PWR(pbyte) (((pbyte) >> 6) & 3)
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#define QSFP_HIGH_PWR(pbyte) ((pbyte) & 3)
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/* For use with QSFP_HIGH_PWR macro */
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#define QSFP_HIGH_PWR_UNUSED 0 /* Bits [1:0] = 00 implies low power module */
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/*
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* Takes power class byte [Page 00 Byte 129] in SFF 8636
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* Returns power class as integer (1 through 7, per SFF 8636 rev 2.4)
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*/
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int get_qsfp_power_class(u8 power_byte)
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{
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if (QSFP_HIGH_PWR(power_byte) == QSFP_HIGH_PWR_UNUSED)
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/* power classes count from 1, their bit encodings from 0 */
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return (QSFP_PWR(power_byte) + 1);
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/*
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* 00 in the high power classes stands for unused, bringing
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* balance to the off-by-1 offset above, we add 4 here to
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* account for the difference between the low and high power
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* groups
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*/
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return (QSFP_HIGH_PWR(power_byte) + 4);
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}
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int qsfp_mod_present(struct hfi1_pportdata *ppd)
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{
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struct hfi1_devdata *dd = ppd->dd;
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u64 reg;
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|
|
reg = read_csr(dd, dd->hfi1_id ? ASIC_QSFP2_IN : ASIC_QSFP1_IN);
|
|
return !(reg & QSFP_HFI0_MODPRST_N);
|
|
}
|
|
|
|
/*
|
|
* This function maps QSFP memory addresses in 128 byte chunks in the following
|
|
* fashion per the CableInfo SMA query definition in the IBA 1.3 spec/OPA Gen 1
|
|
* spec
|
|
* For addr 000-127, lower page 00h
|
|
* For addr 128-255, upper page 00h
|
|
* For addr 256-383, upper page 01h
|
|
* For addr 384-511, upper page 02h
|
|
* For addr 512-639, upper page 03h
|
|
*
|
|
* For addresses beyond this range, it returns the invalid range of data buffer
|
|
* set to 0.
|
|
* For upper pages that are optional, if they are not valid, returns the
|
|
* particular range of bytes in the data buffer set to 0.
|
|
*/
|
|
int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr, u32 len,
|
|
u8 *data)
|
|
{
|
|
struct hfi1_pportdata *ppd;
|
|
u32 excess_len = 0;
|
|
int ret = 0;
|
|
|
|
if (port_num > dd->num_pports || port_num < 1) {
|
|
dd_dev_info(dd, "%s: Invalid port number %d\n",
|
|
__func__, port_num);
|
|
ret = -EINVAL;
|
|
goto set_zeroes;
|
|
}
|
|
|
|
ppd = dd->pport + (port_num - 1);
|
|
if (!qsfp_mod_present(ppd)) {
|
|
ret = -ENODEV;
|
|
goto set_zeroes;
|
|
}
|
|
|
|
if (!ppd->qsfp_info.cache_valid) {
|
|
ret = -EINVAL;
|
|
goto set_zeroes;
|
|
}
|
|
|
|
if (addr >= (QSFP_MAX_NUM_PAGES * 128)) {
|
|
ret = -ERANGE;
|
|
goto set_zeroes;
|
|
}
|
|
|
|
if ((addr + len) > (QSFP_MAX_NUM_PAGES * 128)) {
|
|
excess_len = (addr + len) - (QSFP_MAX_NUM_PAGES * 128);
|
|
memcpy(data, &ppd->qsfp_info.cache[addr], (len - excess_len));
|
|
data += (len - excess_len);
|
|
goto set_zeroes;
|
|
}
|
|
|
|
memcpy(data, &ppd->qsfp_info.cache[addr], len);
|
|
return 0;
|
|
|
|
set_zeroes:
|
|
memset(data, 0, excess_len);
|
|
return ret;
|
|
}
|
|
|
|
static const char *pwr_codes[8] = {"N/AW",
|
|
"1.5W",
|
|
"2.0W",
|
|
"2.5W",
|
|
"3.5W",
|
|
"4.0W",
|
|
"4.5W",
|
|
"5.0W"
|
|
};
|
|
|
|
int qsfp_dump(struct hfi1_pportdata *ppd, char *buf, int len)
|
|
{
|
|
u8 *cache = &ppd->qsfp_info.cache[0];
|
|
u8 bin_buff[QSFP_DUMP_CHUNK];
|
|
char lenstr[6];
|
|
int sofar;
|
|
int bidx = 0;
|
|
u8 *atten = &cache[QSFP_ATTEN_OFFS];
|
|
u8 *vendor_oui = &cache[QSFP_VOUI_OFFS];
|
|
u8 power_byte = 0;
|
|
|
|
sofar = 0;
|
|
lenstr[0] = ' ';
|
|
lenstr[1] = '\0';
|
|
|
|
if (ppd->qsfp_info.cache_valid) {
|
|
if (QSFP_IS_CU(cache[QSFP_MOD_TECH_OFFS]))
|
|
snprintf(lenstr, sizeof(lenstr), "%dM ",
|
|
cache[QSFP_MOD_LEN_OFFS]);
|
|
|
|
power_byte = cache[QSFP_MOD_PWR_OFFS];
|
|
sofar += scnprintf(buf + sofar, len - sofar, "PWR:%.3sW\n",
|
|
pwr_codes[get_qsfp_power_class(power_byte)]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "TECH:%s%s\n",
|
|
lenstr,
|
|
hfi1_qsfp_devtech[(cache[QSFP_MOD_TECH_OFFS]) >> 4]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Vendor:%.*s\n",
|
|
QSFP_VEND_LEN, &cache[QSFP_VEND_OFFS]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "OUI:%06X\n",
|
|
QSFP_OUI(vendor_oui));
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Part#:%.*s\n",
|
|
QSFP_PN_LEN, &cache[QSFP_PN_OFFS]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Rev:%.*s\n",
|
|
QSFP_REV_LEN, &cache[QSFP_REV_OFFS]);
|
|
|
|
if (QSFP_IS_CU(cache[QSFP_MOD_TECH_OFFS]))
|
|
sofar += scnprintf(buf + sofar, len - sofar,
|
|
"Atten:%d, %d\n",
|
|
QSFP_ATTEN_SDR(atten),
|
|
QSFP_ATTEN_DDR(atten));
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Serial:%.*s\n",
|
|
QSFP_SN_LEN, &cache[QSFP_SN_OFFS]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Date:%.*s\n",
|
|
QSFP_DATE_LEN, &cache[QSFP_DATE_OFFS]);
|
|
|
|
sofar += scnprintf(buf + sofar, len - sofar, "Lot:%.*s\n",
|
|
QSFP_LOT_LEN, &cache[QSFP_LOT_OFFS]);
|
|
|
|
while (bidx < QSFP_DEFAULT_HDR_CNT) {
|
|
int iidx;
|
|
|
|
memcpy(bin_buff, &cache[bidx], QSFP_DUMP_CHUNK);
|
|
for (iidx = 0; iidx < QSFP_DUMP_CHUNK; ++iidx) {
|
|
sofar += scnprintf(buf + sofar, len - sofar,
|
|
" %02X", bin_buff[iidx]);
|
|
}
|
|
sofar += scnprintf(buf + sofar, len - sofar, "\n");
|
|
bidx += QSFP_DUMP_CHUNK;
|
|
}
|
|
}
|
|
return sofar;
|
|
}
|