185 lines
4.6 KiB
C
185 lines
4.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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/* exynos_drm.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef _UAPI_EXYNOS_DRM_H_
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#define _UAPI_EXYNOS_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* User-desired buffer creation information structure.
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*
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* @size: user-desired memory allocation size.
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* - this size value would be page-aligned internally.
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* @flags: user request for setting memory type or cache attributes.
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* @handle: returned a handle to created gem object.
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* - this handle will be set by gem module of kernel side.
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*/
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struct drm_exynos_gem_create {
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__u64 size;
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__u32 flags;
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__u32 handle;
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};
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/**
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* A structure for getting a fake-offset that can be used with mmap.
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*
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* @handle: handle of gem object.
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* @reserved: just padding to be 64-bit aligned.
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* @offset: a fake-offset of gem object.
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*/
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struct drm_exynos_gem_map {
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__u32 handle;
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__u32 reserved;
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__u64 offset;
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};
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/**
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* A structure to gem information.
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*
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* @handle: a handle to gem object created.
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* @flags: flag value including memory type and cache attribute and
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* this value would be set by driver.
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* @size: size to memory region allocated by gem and this size would
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* be set by driver.
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*/
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struct drm_exynos_gem_info {
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__u32 handle;
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__u32 flags;
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__u64 size;
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};
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/**
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* A structure for user connection request of virtual display.
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*
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* @connection: indicate whether doing connetion or not by user.
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* @extensions: if this value is 1 then the vidi driver would need additional
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* 128bytes edid data.
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* @edid: the edid data pointer from user side.
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*/
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struct drm_exynos_vidi_connection {
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__u32 connection;
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__u32 extensions;
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__u64 edid;
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};
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/* memory type definitions. */
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enum e_drm_exynos_gem_mem_type {
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/* Physically Continuous memory and used as default. */
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EXYNOS_BO_CONTIG = 0 << 0,
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/* Physically Non-Continuous memory. */
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EXYNOS_BO_NONCONTIG = 1 << 0,
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/* non-cachable mapping and used as default. */
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EXYNOS_BO_NONCACHABLE = 0 << 1,
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/* cachable mapping. */
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EXYNOS_BO_CACHABLE = 1 << 1,
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/* write-combine mapping. */
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EXYNOS_BO_WC = 1 << 2,
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EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
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EXYNOS_BO_WC
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};
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struct drm_exynos_g2d_get_ver {
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__u32 major;
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__u32 minor;
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};
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struct drm_exynos_g2d_cmd {
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__u32 offset;
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__u32 data;
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};
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enum drm_exynos_g2d_buf_type {
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G2D_BUF_USERPTR = 1 << 31,
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};
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enum drm_exynos_g2d_event_type {
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G2D_EVENT_NOT,
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G2D_EVENT_NONSTOP,
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G2D_EVENT_STOP, /* not yet */
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};
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struct drm_exynos_g2d_userptr {
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unsigned long userptr;
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unsigned long size;
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};
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struct drm_exynos_g2d_set_cmdlist {
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__u64 cmd;
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__u64 cmd_buf;
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__u32 cmd_nr;
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__u32 cmd_buf_nr;
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/* for g2d event */
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__u64 event_type;
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__u64 user_data;
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};
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struct drm_exynos_g2d_exec {
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__u64 async;
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};
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#define DRM_EXYNOS_GEM_CREATE 0x00
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#define DRM_EXYNOS_GEM_MAP 0x01
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/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
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#define DRM_EXYNOS_GEM_GET 0x04
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#define DRM_EXYNOS_VIDI_CONNECTION 0x07
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/* G2D */
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#define DRM_EXYNOS_G2D_GET_VER 0x20
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#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
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#define DRM_EXYNOS_G2D_EXEC 0x22
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/* Reserved 0x30 ~ 0x33 for obsolete Exynos IPP ioctls */
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#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
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#define DRM_IOCTL_EXYNOS_GEM_MAP DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_GEM_MAP, struct drm_exynos_gem_map)
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#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
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#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
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#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
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#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
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#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
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DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
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/* EXYNOS specific events */
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#define DRM_EXYNOS_G2D_EVENT 0x80000000
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struct drm_exynos_g2d_event {
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struct drm_event base;
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__u64 user_data;
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__u32 tv_sec;
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__u32 tv_usec;
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__u32 cmdlist_no;
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__u32 reserved;
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};
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _UAPI_EXYNOS_DRM_H_ */
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