OpenCloudOS-Kernel/drivers/cxl
Robert Richter 2cc1a530ab cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window
commit 0cab687205986491302cd2e440ef1d253031c221 upstream.

The Linux CXL subsystem is built on the assumption that HPA == SPA.
That is, the host physical address (HPA) the HDM decoder registers are
programmed with are system physical addresses (SPA).

During HDM decoder setup, the DVSEC CXL range registers (cxl-3.1,
8.1.3.8) are checked if the memory is enabled and the CXL range is in
a HPA window that is described in a CFMWS structure of the CXL host
bridge (cxl-3.1, 9.18.1.3).

Now, if the HPA is not an SPA, the CXL range does not match a CFMWS
window and the CXL memory range will be disabled then. The HDM decoder
stops working which causes system memory being disabled and further a
system hang during HDM decoder initialization, typically when a CXL
enabled kernel boots.

Prevent a system hang and do not disable the HDM decoder if the
decoder's CXL range is not found in a CFMWS window.

Note the change only fixes a hardware hang, but does not implement
HPA/SPA translation. Support for this can be added in a follow on
patch series.

Signed-off-by: Robert Richter <rrichter@amd.com>
Fixes: 34e37b4c43 ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20240216160113.407141-1-rrichter@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-03-01 13:34:59 +01:00
..
core cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window 2024-03-01 13:34:59 +01:00
Kconfig cxl: fix CONFIG_FW_LOADER dependency 2023-07-14 14:32:22 -06:00
Makefile cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation 2022-11-30 16:30:47 -08:00
acpi.c cxl/acpi: Fix load failures due to single window creation failure 2024-03-01 13:34:59 +01:00
cxl.h cxl/port: Fix missing target list lock 2024-01-25 15:35:55 -08:00
cxlmem.h cxl/memdev: Fix sanitize vs decoder setup locking 2023-11-20 11:59:30 +01:00
cxlpci.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
mem.c Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl 2023-06-25 18:56:13 -07:00
pci.c cxl/core/regs: Rename @dev to @host in struct cxl_register_map 2023-11-20 11:59:31 +01:00
pmem.c cxl/mbox: Move mailbox related driver state to its own data structure 2023-06-25 14:31:08 -07:00
pmu.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
port.c Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl 2023-06-25 18:56:13 -07:00
security.c Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl 2023-06-25 17:16:51 -07:00