830 lines
22 KiB
C
830 lines
22 KiB
C
#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/pm.h>
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#include <linux/efi.h>
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#include <linux/dmi.h>
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#include <linux/sched.h>
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#include <linux/tboot.h>
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#include <acpi/reboot.h>
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#include <asm/io.h>
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#include <asm/apic.h>
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#include <asm/desc.h>
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#include <asm/hpet.h>
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#include <asm/pgtable.h>
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#include <asm/proto.h>
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#include <asm/reboot_fixups.h>
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#include <asm/reboot.h>
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#include <asm/pci_x86.h>
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#include <asm/virtext.h>
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#include <asm/cpu.h>
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#ifdef CONFIG_X86_32
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# include <linux/ctype.h>
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# include <linux/mc146818rtc.h>
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#else
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# include <asm/x86_init.h>
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#endif
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/*
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* Power off function, if any
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*/
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void (*pm_power_off)(void);
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EXPORT_SYMBOL(pm_power_off);
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static const struct desc_ptr no_idt = {};
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static int reboot_mode;
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enum reboot_type reboot_type = BOOT_KBD;
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int reboot_force;
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#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
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static int reboot_cpu = -1;
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#endif
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/* This is set if we need to go through the 'emergency' path.
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* When machine_emergency_restart() is called, we may be on
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* an inconsistent state and won't be able to do a clean cleanup
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*/
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static int reboot_emergency;
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/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
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bool port_cf9_safe = false;
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/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
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warm Don't set the cold reboot flag
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cold Set the cold reboot flag
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bios Reboot by jumping through the BIOS (only for X86_32)
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smp Reboot by executing reset on BSP or other CPU (only for X86_32)
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triple Force a triple fault (init)
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kbd Use the keyboard controller. cold reset (default)
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acpi Use the RESET_REG in the FADT
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efi Use efi reset_system runtime service
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pci Use the so-called "PCI reset register", CF9
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force Avoid anything that could hang.
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*/
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static int __init reboot_setup(char *str)
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{
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for (;;) {
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switch (*str) {
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case 'w':
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reboot_mode = 0x1234;
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break;
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case 'c':
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reboot_mode = 0;
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break;
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#ifdef CONFIG_X86_32
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#ifdef CONFIG_SMP
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case 's':
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if (isdigit(*(str+1))) {
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reboot_cpu = (int) (*(str+1) - '0');
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if (isdigit(*(str+2)))
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reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
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}
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/* we will leave sorting out the final value
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when we are ready to reboot, since we might not
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have set up boot_cpu_id or smp_num_cpu */
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break;
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#endif /* CONFIG_SMP */
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case 'b':
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#endif
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case 'a':
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case 'k':
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case 't':
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case 'e':
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case 'p':
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reboot_type = *str;
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break;
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case 'f':
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reboot_force = 1;
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break;
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}
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str = strchr(str, ',');
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if (str)
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str++;
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else
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break;
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}
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return 1;
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}
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__setup("reboot=", reboot_setup);
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#ifdef CONFIG_X86_32
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/*
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* Reboot options and system auto-detection code provided by
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* Dell Inc. so their systems "just work". :-)
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*/
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/*
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* Some machines require the "reboot=b" commandline option,
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* this quirk makes that automatic.
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*/
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static int __init set_bios_reboot(const struct dmi_system_id *d)
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{
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if (reboot_type != BOOT_BIOS) {
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reboot_type = BOOT_BIOS;
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printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
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}
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return 0;
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}
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static struct dmi_system_id __initdata reboot_dmi_table[] = {
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{ /* Handle problems with rebooting on Dell E520's */
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.callback = set_bios_reboot,
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.ident = "Dell E520",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
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},
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},
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{ /* Handle problems with rebooting on Dell 1300's */
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.callback = set_bios_reboot,
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.ident = "Dell PowerEdge 1300",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
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},
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},
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{ /* Handle problems with rebooting on Dell 300's */
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.callback = set_bios_reboot,
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.ident = "Dell PowerEdge 300",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
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},
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},
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{ /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 745",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
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},
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},
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{ /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 745",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
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DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
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},
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},
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{ /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 745",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
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DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
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},
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},
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{ /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 330",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
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DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
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},
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},
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{ /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 360",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"),
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DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
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},
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},
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{ /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/
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.callback = set_bios_reboot,
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.ident = "Dell OptiPlex 760",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"),
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DMI_MATCH(DMI_BOARD_NAME, "0G919G"),
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},
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},
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{ /* Handle problems with rebooting on Dell 2400's */
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.callback = set_bios_reboot,
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.ident = "Dell PowerEdge 2400",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
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},
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},
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{ /* Handle problems with rebooting on Dell T5400's */
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.callback = set_bios_reboot,
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.ident = "Dell Precision T5400",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
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},
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},
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{ /* Handle problems with rebooting on Dell T7400's */
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.callback = set_bios_reboot,
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.ident = "Dell Precision T7400",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"),
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},
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},
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{ /* Handle problems with rebooting on HP laptops */
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.callback = set_bios_reboot,
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.ident = "HP Compaq Laptop",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
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},
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},
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{ /* Handle problems with rebooting on Dell XPS710 */
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.callback = set_bios_reboot,
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.ident = "Dell XPS710",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
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},
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},
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{ /* Handle problems with rebooting on Dell DXP061 */
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.callback = set_bios_reboot,
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.ident = "Dell DXP061",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"),
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},
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},
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{ /* Handle problems with rebooting on Sony VGN-Z540N */
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.callback = set_bios_reboot,
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.ident = "Sony VGN-Z540N",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
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},
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},
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{ /* Handle problems with rebooting on CompuLab SBC-FITPC2 */
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.callback = set_bios_reboot,
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.ident = "CompuLab SBC-FITPC2",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"),
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DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"),
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},
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},
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{ /* Handle problems with rebooting on ASUS P4S800 */
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.callback = set_bios_reboot,
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.ident = "ASUS P4S800",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
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DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
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},
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},
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{ }
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};
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static int __init reboot_init(void)
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{
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dmi_check_system(reboot_dmi_table);
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return 0;
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}
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core_initcall(reboot_init);
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/* The following code and data reboots the machine by switching to real
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mode and jumping to the BIOS reset entry point, as if the CPU has
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really been reset. The previous version asked the keyboard
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controller to pulse the CPU reset line, which is more thorough, but
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doesn't work with at least one type of 486 motherboard. It is easy
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to stop this code working; hence the copious comments. */
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static const unsigned long long
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real_mode_gdt_entries [3] =
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{
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0x0000000000000000ULL, /* Null descriptor */
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0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
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0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
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};
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static const struct desc_ptr
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real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
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real_mode_idt = { 0x3ff, 0 };
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/* This is 16-bit protected mode code to disable paging and the cache,
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switch to real mode and jump to the BIOS reset code.
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The instruction that switches to real mode by writing to CR0 must be
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followed immediately by a far jump instruction, which set CS to a
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valid value for real mode, and flushes the prefetch queue to avoid
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running instructions that have already been decoded in protected
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mode.
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Clears all the flags except ET, especially PG (paging), PE
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(protected-mode enable) and TS (task switch for coprocessor state
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save). Flushes the TLB after paging has been disabled. Sets CD and
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NW, to disable the cache on a 486, and invalidates the cache. This
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is more like the state of a 486 after reset. I don't know if
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something else should be done for other chips.
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More could be done here to set up the registers as if a CPU reset had
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occurred; hopefully real BIOSs don't assume much. */
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static const unsigned char real_mode_switch [] =
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{
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0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
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0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
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0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
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0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
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0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
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0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
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0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
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0x74, 0x02, /* jz f */
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0x0f, 0x09, /* wbinvd */
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0x24, 0x10, /* f: andb $0x10,al */
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0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
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};
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static const unsigned char jump_to_bios [] =
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{
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0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
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};
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/*
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* Switch to real mode and then execute the code
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* specified by the code and length parameters.
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* We assume that length will aways be less that 100!
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*/
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void machine_real_restart(const unsigned char *code, int length)
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{
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local_irq_disable();
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/* Write zero to CMOS register number 0x0f, which the BIOS POST
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routine will recognize as telling it to do a proper reboot. (Well
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that's what this book in front of me says -- it may only apply to
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the Phoenix BIOS though, it's not clear). At the same time,
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disable NMIs by setting the top bit in the CMOS address register,
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as we're about to do peculiar things to the CPU. I'm not sure if
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`outb_p' is needed instead of just `outb'. Use it to be on the
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safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
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*/
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spin_lock(&rtc_lock);
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CMOS_WRITE(0x00, 0x8f);
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spin_unlock(&rtc_lock);
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/* Remap the kernel at virtual address zero, as well as offset zero
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from the kernel segment. This assumes the kernel segment starts at
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virtual address PAGE_OFFSET. */
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memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
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sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
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/*
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* Use `swapper_pg_dir' as our page directory.
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*/
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load_cr3(swapper_pg_dir);
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/* Write 0x1234 to absolute memory location 0x472. The BIOS reads
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this on booting to tell it to "Bypass memory test (also warm
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boot)". This seems like a fairly standard thing that gets set by
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REBOOT.COM programs, and the previous reset routine did this
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too. */
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*((unsigned short *)0x472) = reboot_mode;
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/* For the switch to real mode, copy some code to low memory. It has
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to be in the first 64k because it is running in 16-bit mode, and it
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has to have the same physical and virtual address, because it turns
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off paging. Copy it near the end of the first page, out of the way
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of BIOS variables. */
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memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
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real_mode_switch, sizeof (real_mode_switch));
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memcpy((void *)(0x1000 - 100), code, length);
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/* Set up the IDT for real mode. */
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load_idt(&real_mode_idt);
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/* Set up a GDT from which we can load segment descriptors for real
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mode. The GDT is not used in real mode; it is just needed here to
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prepare the descriptors. */
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load_gdt(&real_mode_gdt);
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/* Load the data segment registers, and thus the descriptors ready for
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real mode. The base address of each segment is 0x100, 16 times the
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selector value being loaded here. This is so that the segment
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registers don't have to be reloaded after switching to real mode:
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the values are consistent for real mode operation already. */
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__asm__ __volatile__ ("movl $0x0010,%%eax\n"
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"\tmovl %%eax,%%ds\n"
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"\tmovl %%eax,%%es\n"
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"\tmovl %%eax,%%fs\n"
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"\tmovl %%eax,%%gs\n"
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"\tmovl %%eax,%%ss" : : : "eax");
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/* Jump to the 16-bit code that we copied earlier. It disables paging
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and the cache, switches to real mode, and jumps to the BIOS reset
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entry point. */
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__asm__ __volatile__ ("ljmp $0x0008,%0"
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:
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: "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
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}
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#ifdef CONFIG_APM_MODULE
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EXPORT_SYMBOL(machine_real_restart);
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#endif
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#endif /* CONFIG_X86_32 */
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/*
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* Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot
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*/
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static int __init set_pci_reboot(const struct dmi_system_id *d)
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{
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if (reboot_type != BOOT_CF9) {
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reboot_type = BOOT_CF9;
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printk(KERN_INFO "%s series board detected. "
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"Selecting PCI-method for reboots.\n", d->ident);
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}
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return 0;
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}
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static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
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{ /* Handle problems with rebooting on Apple MacBook5 */
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.callback = set_pci_reboot,
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.ident = "Apple MacBook5",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"),
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},
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},
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{ /* Handle problems with rebooting on Apple MacBookPro5 */
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.callback = set_pci_reboot,
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.ident = "Apple MacBookPro5",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"),
|
|
},
|
|
},
|
|
{ /* Handle problems with rebooting on Apple Macmini3,1 */
|
|
.callback = set_pci_reboot,
|
|
.ident = "Apple Macmini3,1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
|
|
},
|
|
},
|
|
{ /* Handle problems with rebooting on the iMac9,1. */
|
|
.callback = set_pci_reboot,
|
|
.ident = "Apple iMac9,1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"),
|
|
},
|
|
},
|
|
{ }
|
|
};
|
|
|
|
static int __init pci_reboot_init(void)
|
|
{
|
|
dmi_check_system(pci_reboot_dmi_table);
|
|
return 0;
|
|
}
|
|
core_initcall(pci_reboot_init);
|
|
|
|
static inline void kb_wait(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 0x10000; i++) {
|
|
if ((inb(0x64) & 0x02) == 0)
|
|
break;
|
|
udelay(2);
|
|
}
|
|
}
|
|
|
|
static void vmxoff_nmi(int cpu, struct die_args *args)
|
|
{
|
|
cpu_emergency_vmxoff();
|
|
}
|
|
|
|
/* Use NMIs as IPIs to tell all CPUs to disable virtualization
|
|
*/
|
|
static void emergency_vmx_disable_all(void)
|
|
{
|
|
/* Just make sure we won't change CPUs while doing this */
|
|
local_irq_disable();
|
|
|
|
/* We need to disable VMX on all CPUs before rebooting, otherwise
|
|
* we risk hanging up the machine, because the CPU ignore INIT
|
|
* signals when VMX is enabled.
|
|
*
|
|
* We can't take any locks and we may be on an inconsistent
|
|
* state, so we use NMIs as IPIs to tell the other CPUs to disable
|
|
* VMX and halt.
|
|
*
|
|
* For safety, we will avoid running the nmi_shootdown_cpus()
|
|
* stuff unnecessarily, but we don't have a way to check
|
|
* if other CPUs have VMX enabled. So we will call it only if the
|
|
* CPU we are running on has VMX enabled.
|
|
*
|
|
* We will miss cases where VMX is not enabled on all CPUs. This
|
|
* shouldn't do much harm because KVM always enable VMX on all
|
|
* CPUs anyway. But we can miss it on the small window where KVM
|
|
* is still enabling VMX.
|
|
*/
|
|
if (cpu_has_vmx() && cpu_vmx_enabled()) {
|
|
/* Disable VMX on this CPU.
|
|
*/
|
|
cpu_vmxoff();
|
|
|
|
/* Halt and disable VMX on the other CPUs */
|
|
nmi_shootdown_cpus(vmxoff_nmi);
|
|
|
|
}
|
|
}
|
|
|
|
|
|
void __attribute__((weak)) mach_reboot_fixups(void)
|
|
{
|
|
}
|
|
|
|
static void native_machine_emergency_restart(void)
|
|
{
|
|
int i;
|
|
|
|
if (reboot_emergency)
|
|
emergency_vmx_disable_all();
|
|
|
|
tboot_shutdown(TB_SHUTDOWN_REBOOT);
|
|
|
|
/* Tell the BIOS if we want cold or warm reboot */
|
|
*((unsigned short *)__va(0x472)) = reboot_mode;
|
|
|
|
for (;;) {
|
|
/* Could also try the reset bit in the Hammer NB */
|
|
switch (reboot_type) {
|
|
case BOOT_KBD:
|
|
mach_reboot_fixups(); /* for board specific fixups */
|
|
|
|
for (i = 0; i < 10; i++) {
|
|
kb_wait();
|
|
udelay(50);
|
|
outb(0xfe, 0x64); /* pulse reset low */
|
|
udelay(50);
|
|
}
|
|
|
|
case BOOT_TRIPLE:
|
|
load_idt(&no_idt);
|
|
__asm__ __volatile__("int3");
|
|
|
|
reboot_type = BOOT_KBD;
|
|
break;
|
|
|
|
#ifdef CONFIG_X86_32
|
|
case BOOT_BIOS:
|
|
machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
|
|
|
|
reboot_type = BOOT_KBD;
|
|
break;
|
|
#endif
|
|
|
|
case BOOT_ACPI:
|
|
acpi_reboot();
|
|
reboot_type = BOOT_KBD;
|
|
break;
|
|
|
|
case BOOT_EFI:
|
|
if (efi_enabled)
|
|
efi.reset_system(reboot_mode ?
|
|
EFI_RESET_WARM :
|
|
EFI_RESET_COLD,
|
|
EFI_SUCCESS, 0, NULL);
|
|
reboot_type = BOOT_KBD;
|
|
break;
|
|
|
|
case BOOT_CF9:
|
|
port_cf9_safe = true;
|
|
/* fall through */
|
|
|
|
case BOOT_CF9_COND:
|
|
if (port_cf9_safe) {
|
|
u8 cf9 = inb(0xcf9) & ~6;
|
|
outb(cf9|2, 0xcf9); /* Request hard reset */
|
|
udelay(50);
|
|
outb(cf9|6, 0xcf9); /* Actually do the reset */
|
|
udelay(50);
|
|
}
|
|
reboot_type = BOOT_KBD;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void native_machine_shutdown(void)
|
|
{
|
|
/* Stop the cpus and apics */
|
|
#ifdef CONFIG_SMP
|
|
|
|
/* The boot cpu is always logical cpu 0 */
|
|
int reboot_cpu_id = 0;
|
|
|
|
#ifdef CONFIG_X86_32
|
|
/* See if there has been given a command line override */
|
|
if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
|
|
cpu_online(reboot_cpu))
|
|
reboot_cpu_id = reboot_cpu;
|
|
#endif
|
|
|
|
/* Make certain the cpu I'm about to reboot on is online */
|
|
if (!cpu_online(reboot_cpu_id))
|
|
reboot_cpu_id = smp_processor_id();
|
|
|
|
/* Make certain I only run on the appropriate processor */
|
|
set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
|
|
|
|
/* O.K Now that I'm on the appropriate processor,
|
|
* stop all of the others.
|
|
*/
|
|
smp_send_stop();
|
|
#endif
|
|
|
|
lapic_shutdown();
|
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
|
disable_IO_APIC();
|
|
#endif
|
|
|
|
#ifdef CONFIG_HPET_TIMER
|
|
hpet_disable();
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_64
|
|
x86_platform.iommu_shutdown();
|
|
#endif
|
|
}
|
|
|
|
static void __machine_emergency_restart(int emergency)
|
|
{
|
|
reboot_emergency = emergency;
|
|
machine_ops.emergency_restart();
|
|
}
|
|
|
|
static void native_machine_restart(char *__unused)
|
|
{
|
|
printk("machine restart\n");
|
|
|
|
if (!reboot_force)
|
|
machine_shutdown();
|
|
__machine_emergency_restart(0);
|
|
}
|
|
|
|
static void native_machine_halt(void)
|
|
{
|
|
/* stop other cpus and apics */
|
|
machine_shutdown();
|
|
|
|
tboot_shutdown(TB_SHUTDOWN_HALT);
|
|
|
|
/* stop this cpu */
|
|
stop_this_cpu(NULL);
|
|
}
|
|
|
|
static void native_machine_power_off(void)
|
|
{
|
|
if (pm_power_off) {
|
|
if (!reboot_force)
|
|
machine_shutdown();
|
|
pm_power_off();
|
|
}
|
|
/* a fallback in case there is no PM info available */
|
|
tboot_shutdown(TB_SHUTDOWN_HALT);
|
|
}
|
|
|
|
struct machine_ops machine_ops = {
|
|
.power_off = native_machine_power_off,
|
|
.shutdown = native_machine_shutdown,
|
|
.emergency_restart = native_machine_emergency_restart,
|
|
.restart = native_machine_restart,
|
|
.halt = native_machine_halt,
|
|
#ifdef CONFIG_KEXEC
|
|
.crash_shutdown = native_machine_crash_shutdown,
|
|
#endif
|
|
};
|
|
|
|
void machine_power_off(void)
|
|
{
|
|
machine_ops.power_off();
|
|
}
|
|
|
|
void machine_shutdown(void)
|
|
{
|
|
machine_ops.shutdown();
|
|
}
|
|
|
|
void machine_emergency_restart(void)
|
|
{
|
|
__machine_emergency_restart(1);
|
|
}
|
|
|
|
void machine_restart(char *cmd)
|
|
{
|
|
machine_ops.restart(cmd);
|
|
}
|
|
|
|
void machine_halt(void)
|
|
{
|
|
machine_ops.halt();
|
|
}
|
|
|
|
#ifdef CONFIG_KEXEC
|
|
void machine_crash_shutdown(struct pt_regs *regs)
|
|
{
|
|
machine_ops.crash_shutdown(regs);
|
|
}
|
|
#endif
|
|
|
|
|
|
#if defined(CONFIG_SMP)
|
|
|
|
/* This keeps a track of which one is crashing cpu. */
|
|
static int crashing_cpu;
|
|
static nmi_shootdown_cb shootdown_callback;
|
|
|
|
static atomic_t waiting_for_crash_ipi;
|
|
|
|
static int crash_nmi_callback(struct notifier_block *self,
|
|
unsigned long val, void *data)
|
|
{
|
|
int cpu;
|
|
|
|
if (val != DIE_NMI_IPI)
|
|
return NOTIFY_OK;
|
|
|
|
cpu = raw_smp_processor_id();
|
|
|
|
/* Don't do anything if this handler is invoked on crashing cpu.
|
|
* Otherwise, system will completely hang. Crashing cpu can get
|
|
* an NMI if system was initially booted with nmi_watchdog parameter.
|
|
*/
|
|
if (cpu == crashing_cpu)
|
|
return NOTIFY_STOP;
|
|
local_irq_disable();
|
|
|
|
shootdown_callback(cpu, (struct die_args *)data);
|
|
|
|
atomic_dec(&waiting_for_crash_ipi);
|
|
/* Assume hlt works */
|
|
halt();
|
|
for (;;)
|
|
cpu_relax();
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void smp_send_nmi_allbutself(void)
|
|
{
|
|
apic->send_IPI_allbutself(NMI_VECTOR);
|
|
}
|
|
|
|
static struct notifier_block crash_nmi_nb = {
|
|
.notifier_call = crash_nmi_callback,
|
|
};
|
|
|
|
/* Halt all other CPUs, calling the specified function on each of them
|
|
*
|
|
* This function can be used to halt all other CPUs on crash
|
|
* or emergency reboot time. The function passed as parameter
|
|
* will be called inside a NMI handler on all CPUs.
|
|
*/
|
|
void nmi_shootdown_cpus(nmi_shootdown_cb callback)
|
|
{
|
|
unsigned long msecs;
|
|
local_irq_disable();
|
|
|
|
/* Make a note of crashing cpu. Will be used in NMI callback.*/
|
|
crashing_cpu = safe_smp_processor_id();
|
|
|
|
shootdown_callback = callback;
|
|
|
|
atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
|
|
/* Would it be better to replace the trap vector here? */
|
|
if (register_die_notifier(&crash_nmi_nb))
|
|
return; /* return what? */
|
|
/* Ensure the new callback function is set before sending
|
|
* out the NMI
|
|
*/
|
|
wmb();
|
|
|
|
smp_send_nmi_allbutself();
|
|
|
|
msecs = 1000; /* Wait at most a second for the other cpus to stop */
|
|
while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
|
|
mdelay(1);
|
|
msecs--;
|
|
}
|
|
|
|
/* Leave the nmi callback set */
|
|
}
|
|
#else /* !CONFIG_SMP */
|
|
void nmi_shootdown_cpus(nmi_shootdown_cb callback)
|
|
{
|
|
/* No other CPUs to shoot down */
|
|
}
|
|
#endif
|