400 lines
9.3 KiB
C
400 lines
9.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* xHCI host controller driver for HiSilicon STB SoCs
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*
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* Copyright (C) 2017-2018 HiSilicon Co., Ltd. http://www.hisilicon.com
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*
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* Authors: Jianguo Sun <sunjianguo1@huawei.com>
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include "xhci.h"
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#define GTXTHRCFG 0xc108
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#define GRXTHRCFG 0xc10c
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#define REG_GUSB2PHYCFG0 0xc200
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#define BIT_UTMI_8_16 BIT(3)
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#define BIT_UTMI_ULPI BIT(4)
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#define BIT_FREECLK_EXIST BIT(30)
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#define REG_GUSB3PIPECTL0 0xc2c0
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#define USB3_DEEMPHASIS_MASK GENMASK(2, 1)
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#define USB3_DEEMPHASIS0 BIT(1)
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#define USB3_TX_MARGIN1 BIT(4)
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struct xhci_hcd_histb {
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struct device *dev;
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struct usb_hcd *hcd;
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void __iomem *ctrl;
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struct clk *bus_clk;
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struct clk *utmi_clk;
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struct clk *pipe_clk;
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struct clk *suspend_clk;
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struct reset_control *soft_reset;
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};
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static inline struct xhci_hcd_histb *hcd_to_histb(struct usb_hcd *hcd)
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{
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return dev_get_drvdata(hcd->self.controller);
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}
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static int xhci_histb_config(struct xhci_hcd_histb *histb)
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{
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struct device_node *np = histb->dev->of_node;
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u32 regval;
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if (of_property_match_string(np, "phys-names", "inno") >= 0) {
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/* USB2 PHY chose ulpi 8bit interface */
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regval = readl(histb->ctrl + REG_GUSB2PHYCFG0);
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regval &= ~BIT_UTMI_ULPI;
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regval &= ~(BIT_UTMI_8_16);
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regval &= ~BIT_FREECLK_EXIST;
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writel(regval, histb->ctrl + REG_GUSB2PHYCFG0);
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}
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if (of_property_match_string(np, "phys-names", "combo") >= 0) {
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/*
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* write 0x010c0012 to GUSB3PIPECTL0
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* GUSB3PIPECTL0[5:3] = 010 : Tx Margin = 900mV ,
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* decrease TX voltage
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* GUSB3PIPECTL0[2:1] = 01 : Tx Deemphasis = -3.5dB,
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* refer to xHCI spec
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*/
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regval = readl(histb->ctrl + REG_GUSB3PIPECTL0);
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regval &= ~USB3_DEEMPHASIS_MASK;
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regval |= USB3_DEEMPHASIS0;
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regval |= USB3_TX_MARGIN1;
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writel(regval, histb->ctrl + REG_GUSB3PIPECTL0);
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}
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writel(0x23100000, histb->ctrl + GTXTHRCFG);
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writel(0x23100000, histb->ctrl + GRXTHRCFG);
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return 0;
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}
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static int xhci_histb_clks_get(struct xhci_hcd_histb *histb)
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{
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struct device *dev = histb->dev;
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histb->bus_clk = devm_clk_get(dev, "bus");
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if (IS_ERR(histb->bus_clk)) {
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dev_err(dev, "fail to get bus clk\n");
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return PTR_ERR(histb->bus_clk);
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}
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histb->utmi_clk = devm_clk_get(dev, "utmi");
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if (IS_ERR(histb->utmi_clk)) {
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dev_err(dev, "fail to get utmi clk\n");
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return PTR_ERR(histb->utmi_clk);
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}
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histb->pipe_clk = devm_clk_get(dev, "pipe");
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if (IS_ERR(histb->pipe_clk)) {
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dev_err(dev, "fail to get pipe clk\n");
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return PTR_ERR(histb->pipe_clk);
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}
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histb->suspend_clk = devm_clk_get(dev, "suspend");
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if (IS_ERR(histb->suspend_clk)) {
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dev_err(dev, "fail to get suspend clk\n");
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return PTR_ERR(histb->suspend_clk);
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}
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return 0;
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}
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static int xhci_histb_host_enable(struct xhci_hcd_histb *histb)
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{
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int ret;
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ret = clk_prepare_enable(histb->bus_clk);
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if (ret) {
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dev_err(histb->dev, "failed to enable bus clk\n");
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return ret;
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}
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ret = clk_prepare_enable(histb->utmi_clk);
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if (ret) {
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dev_err(histb->dev, "failed to enable utmi clk\n");
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goto err_utmi_clk;
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}
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ret = clk_prepare_enable(histb->pipe_clk);
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if (ret) {
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dev_err(histb->dev, "failed to enable pipe clk\n");
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goto err_pipe_clk;
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}
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ret = clk_prepare_enable(histb->suspend_clk);
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if (ret) {
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dev_err(histb->dev, "failed to enable suspend clk\n");
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goto err_suspend_clk;
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}
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reset_control_deassert(histb->soft_reset);
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return 0;
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err_suspend_clk:
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clk_disable_unprepare(histb->pipe_clk);
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err_pipe_clk:
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clk_disable_unprepare(histb->utmi_clk);
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err_utmi_clk:
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clk_disable_unprepare(histb->bus_clk);
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return ret;
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}
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static void xhci_histb_host_disable(struct xhci_hcd_histb *histb)
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{
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reset_control_assert(histb->soft_reset);
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clk_disable_unprepare(histb->suspend_clk);
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clk_disable_unprepare(histb->pipe_clk);
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clk_disable_unprepare(histb->utmi_clk);
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clk_disable_unprepare(histb->bus_clk);
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}
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/* called during probe() after chip reset completes */
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static int xhci_histb_setup(struct usb_hcd *hcd)
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{
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struct xhci_hcd_histb *histb = hcd_to_histb(hcd);
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int ret;
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if (usb_hcd_is_primary_hcd(hcd)) {
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ret = xhci_histb_config(histb);
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if (ret)
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return ret;
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}
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return xhci_gen_setup(hcd, NULL);
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}
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static const struct xhci_driver_overrides xhci_histb_overrides __initconst = {
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.reset = xhci_histb_setup,
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};
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static struct hc_driver __read_mostly xhci_histb_hc_driver;
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static int xhci_histb_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct xhci_hcd_histb *histb;
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const struct hc_driver *driver;
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struct usb_hcd *hcd;
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struct xhci_hcd *xhci;
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struct resource *res;
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int irq;
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int ret = -ENODEV;
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if (usb_disabled())
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return -ENODEV;
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driver = &xhci_histb_hc_driver;
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histb = devm_kzalloc(dev, sizeof(*histb), GFP_KERNEL);
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if (!histb)
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return -ENOMEM;
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histb->dev = dev;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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histb->ctrl = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(histb->ctrl))
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return PTR_ERR(histb->ctrl);
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ret = xhci_histb_clks_get(histb);
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if (ret)
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return ret;
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histb->soft_reset = devm_reset_control_get(dev, "soft");
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if (IS_ERR(histb->soft_reset)) {
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dev_err(dev, "failed to get soft reset\n");
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return PTR_ERR(histb->soft_reset);
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}
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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device_enable_async_suspend(dev);
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/* Initialize dma_mask and coherent_dma_mask to 32-bits */
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (ret)
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goto disable_pm;
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hcd = usb_create_hcd(driver, dev, dev_name(dev));
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if (!hcd) {
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ret = -ENOMEM;
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goto disable_pm;
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}
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hcd->regs = histb->ctrl;
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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histb->hcd = hcd;
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dev_set_drvdata(hcd->self.controller, histb);
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ret = xhci_histb_host_enable(histb);
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if (ret)
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goto put_hcd;
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xhci = hcd_to_xhci(hcd);
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device_wakeup_enable(hcd->self.controller);
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xhci->main_hcd = hcd;
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xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev),
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hcd);
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if (!xhci->shared_hcd) {
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ret = -ENOMEM;
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goto disable_host;
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}
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if (device_property_read_bool(dev, "usb2-lpm-disable"))
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xhci->quirks |= XHCI_HW_LPM_DISABLE;
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if (device_property_read_bool(dev, "usb3-lpm-capable"))
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xhci->quirks |= XHCI_LPM_SUPPORT;
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/* imod_interval is the interrupt moderation value in nanoseconds. */
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xhci->imod_interval = 40000;
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device_property_read_u32(dev, "imod-interval-ns",
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&xhci->imod_interval);
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ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (ret)
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goto put_usb3_hcd;
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if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
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xhci->shared_hcd->can_do_streams = 1;
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ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
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if (ret)
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goto dealloc_usb2_hcd;
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device_enable_async_suspend(dev);
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pm_runtime_put_noidle(dev);
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/*
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* Prevent runtime pm from being on as default, users should enable
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* runtime pm using power/control in sysfs.
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*/
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pm_runtime_forbid(dev);
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return 0;
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dealloc_usb2_hcd:
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usb_remove_hcd(hcd);
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put_usb3_hcd:
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usb_put_hcd(xhci->shared_hcd);
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disable_host:
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xhci_histb_host_disable(histb);
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put_hcd:
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usb_put_hcd(hcd);
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disable_pm:
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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return ret;
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}
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static void xhci_histb_remove(struct platform_device *dev)
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{
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struct xhci_hcd_histb *histb = platform_get_drvdata(dev);
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struct usb_hcd *hcd = histb->hcd;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct usb_hcd *shared_hcd = xhci->shared_hcd;
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xhci->xhc_state |= XHCI_STATE_REMOVING;
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usb_remove_hcd(shared_hcd);
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xhci->shared_hcd = NULL;
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device_wakeup_disable(&dev->dev);
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usb_remove_hcd(hcd);
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usb_put_hcd(shared_hcd);
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xhci_histb_host_disable(histb);
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usb_put_hcd(hcd);
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pm_runtime_put_sync(&dev->dev);
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pm_runtime_disable(&dev->dev);
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}
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static int __maybe_unused xhci_histb_suspend(struct device *dev)
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{
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struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
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struct usb_hcd *hcd = histb->hcd;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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int ret;
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ret = xhci_suspend(xhci, device_may_wakeup(dev));
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if (!device_may_wakeup(dev))
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xhci_histb_host_disable(histb);
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return ret;
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}
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static int __maybe_unused xhci_histb_resume(struct device *dev)
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{
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struct xhci_hcd_histb *histb = dev_get_drvdata(dev);
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struct usb_hcd *hcd = histb->hcd;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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if (!device_may_wakeup(dev))
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xhci_histb_host_enable(histb);
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return xhci_resume(xhci, PMSG_RESUME);
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}
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static const struct dev_pm_ops xhci_histb_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(xhci_histb_suspend, xhci_histb_resume)
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};
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#define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &xhci_histb_pm_ops : NULL)
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#ifdef CONFIG_OF
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static const struct of_device_id histb_xhci_of_match[] = {
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{ .compatible = "hisilicon,hi3798cv200-xhci"},
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{ },
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};
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MODULE_DEVICE_TABLE(of, histb_xhci_of_match);
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#endif
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static struct platform_driver histb_xhci_driver = {
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.probe = xhci_histb_probe,
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.remove_new = xhci_histb_remove,
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.driver = {
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.name = "xhci-histb",
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.pm = DEV_PM_OPS,
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.of_match_table = of_match_ptr(histb_xhci_of_match),
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},
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};
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MODULE_ALIAS("platform:xhci-histb");
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static int __init xhci_histb_init(void)
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{
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xhci_init_driver(&xhci_histb_hc_driver, &xhci_histb_overrides);
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return platform_driver_register(&histb_xhci_driver);
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}
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module_init(xhci_histb_init);
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static void __exit xhci_histb_exit(void)
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{
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platform_driver_unregister(&histb_xhci_driver);
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}
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module_exit(xhci_histb_exit);
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MODULE_DESCRIPTION("HiSilicon STB xHCI Host Controller Driver");
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MODULE_LICENSE("GPL v2");
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