188 lines
4.6 KiB
C
188 lines
4.6 KiB
C
/*
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* Marvell Orion SoC timer handling.
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*
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* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Timer 0 is used as free-running clocksource, while timer 1 is
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* used as clock_event_device.
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*/
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/clockchips.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/spinlock.h>
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#include <linux/sched_clock.h>
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#define TIMER_CTRL 0x00
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#define TIMER0_EN BIT(0)
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#define TIMER0_RELOAD_EN BIT(1)
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#define TIMER1_EN BIT(2)
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#define TIMER1_RELOAD_EN BIT(3)
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#define TIMER0_RELOAD 0x10
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#define TIMER0_VAL 0x14
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#define TIMER1_RELOAD 0x18
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#define TIMER1_VAL 0x1c
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#define ORION_ONESHOT_MIN 1
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#define ORION_ONESHOT_MAX 0xfffffffe
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static void __iomem *timer_base;
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static unsigned long notrace orion_read_timer(void)
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{
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return ~readl(timer_base + TIMER0_VAL);
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}
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static struct delay_timer orion_delay_timer = {
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.read_current_timer = orion_read_timer,
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};
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static void orion_delay_timer_init(unsigned long rate)
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{
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orion_delay_timer.freq = rate;
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register_current_timer_delay(&orion_delay_timer);
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}
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/*
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* Free-running clocksource handling.
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*/
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static u64 notrace orion_read_sched_clock(void)
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{
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return ~readl(timer_base + TIMER0_VAL);
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}
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/*
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* Clockevent handling.
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*/
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static u32 ticks_per_jiffy;
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static int orion_clkevt_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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/* setup and enable one-shot timer */
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writel(delta, timer_base + TIMER1_VAL);
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atomic_io_modify(timer_base + TIMER_CTRL,
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TIMER1_RELOAD_EN | TIMER1_EN, TIMER1_EN);
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return 0;
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}
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static int orion_clkevt_shutdown(struct clock_event_device *dev)
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{
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/* disable timer */
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atomic_io_modify(timer_base + TIMER_CTRL,
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TIMER1_RELOAD_EN | TIMER1_EN, 0);
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return 0;
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}
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static int orion_clkevt_set_periodic(struct clock_event_device *dev)
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{
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/* setup and enable periodic timer at 1/HZ intervals */
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writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD);
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writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL);
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atomic_io_modify(timer_base + TIMER_CTRL,
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TIMER1_RELOAD_EN | TIMER1_EN,
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TIMER1_RELOAD_EN | TIMER1_EN);
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return 0;
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}
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static struct clock_event_device orion_clkevt = {
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.name = "orion_event",
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.features = CLOCK_EVT_FEAT_ONESHOT |
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CLOCK_EVT_FEAT_PERIODIC,
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.shift = 32,
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.rating = 300,
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.set_next_event = orion_clkevt_next_event,
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.set_state_shutdown = orion_clkevt_shutdown,
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.set_state_periodic = orion_clkevt_set_periodic,
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.set_state_oneshot = orion_clkevt_shutdown,
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.tick_resume = orion_clkevt_shutdown,
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};
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static irqreturn_t orion_clkevt_irq_handler(int irq, void *dev_id)
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{
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orion_clkevt.event_handler(&orion_clkevt);
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return IRQ_HANDLED;
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}
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static int __init orion_timer_init(struct device_node *np)
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{
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unsigned long rate;
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struct clk *clk;
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int irq, ret;
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/* timer registers are shared with watchdog timer */
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timer_base = of_iomap(np, 0);
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if (!timer_base) {
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pr_err("%pOFn: unable to map resource\n", np);
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return -ENXIO;
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}
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk)) {
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pr_err("%pOFn: unable to get clk\n", np);
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return PTR_ERR(clk);
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}
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ret = clk_prepare_enable(clk);
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if (ret) {
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pr_err("Failed to prepare clock\n");
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return ret;
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}
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/* we are only interested in timer1 irq */
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irq = irq_of_parse_and_map(np, 1);
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if (irq <= 0) {
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pr_err("%pOFn: unable to parse timer1 irq\n", np);
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return -EINVAL;
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}
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rate = clk_get_rate(clk);
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/* setup timer0 as free-running clocksource */
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writel(~0, timer_base + TIMER0_VAL);
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writel(~0, timer_base + TIMER0_RELOAD);
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atomic_io_modify(timer_base + TIMER_CTRL,
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TIMER0_RELOAD_EN | TIMER0_EN,
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TIMER0_RELOAD_EN | TIMER0_EN);
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ret = clocksource_mmio_init(timer_base + TIMER0_VAL,
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"orion_clocksource", rate, 300, 32,
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clocksource_mmio_readl_down);
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if (ret) {
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pr_err("Failed to initialize mmio timer\n");
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return ret;
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}
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sched_clock_register(orion_read_sched_clock, 32, rate);
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/* setup timer1 as clockevent timer */
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ret = request_irq(irq, orion_clkevt_irq_handler, IRQF_TIMER,
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"orion_event", NULL);
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if (ret) {
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pr_err("%pOFn: unable to setup irq\n", np);
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return ret;
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}
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ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ;
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orion_clkevt.cpumask = cpumask_of(0);
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orion_clkevt.irq = irq;
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clockevents_config_and_register(&orion_clkevt, rate,
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ORION_ONESHOT_MIN, ORION_ONESHOT_MAX);
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orion_delay_timer_init(rate);
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return 0;
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}
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TIMER_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
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