32 lines
1.2 KiB
C
32 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Phytium Pe220x display controller DRM driver
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*
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* Copyright (C) 2021-2023, Phytium Technology Co., Ltd.
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*/
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#ifndef __PE220X_DC_H__
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#define __PE220X_DC_H__
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#define PE220X_DC_PIX_CLOCK_MAX (594000)
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#define PE220X_DC_HDISPLAY_MAX 3840
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#define PE220X_DC_VDISPLAY_MAX 2160
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#define PE220X_DC_ADDRESS_MASK 0x7f
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extern void pe220x_dc_hw_vram_init(struct phytium_display_private *priv,
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resource_size_t vram_addr,
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resource_size_t vram_size);
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extern void pe220x_dc_hw_config_pix_clock(struct drm_crtc *crtc, int clock);
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extern void pe220x_dc_hw_disable(struct drm_crtc *crtc);
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extern int pe220x_dc_hw_fb_format_check(const struct drm_mode_fb_cmd2 *mode_cmd, int count);
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extern void pe220x_dc_hw_plane_get_primary_format(const uint64_t **format_modifiers,
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const uint32_t **formats,
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uint32_t *format_count);
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extern void pe220x_dc_hw_plane_get_cursor_format(const uint64_t **format_modifiers,
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const uint32_t **formats,
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uint32_t *format_count);
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extern void pe220x_dc_hw_update_primary_hi_addr(struct drm_plane *plane);
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extern void pe220x_dc_hw_update_cursor_hi_addr(struct drm_plane *plane, uint64_t iova);
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void pe220x_dc_hw_reset(struct drm_crtc *crtc);
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#endif /* __PE220X_DC_H__ */
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