162 lines
4.0 KiB
C
162 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Check for extended topology enumeration cpuid leaf 0xb and if it
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* exists, use it for populating initial_apicid and cpu topology
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* detection.
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*/
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#include <linux/cpu.h>
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#include <asm/apic.h>
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#include <asm/pat.h>
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#include <asm/processor.h>
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#include "cpu.h"
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/* leaf 0xb SMT level */
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#define SMT_LEVEL 0
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/* extended topology sub-leaf types */
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#define INVALID_TYPE 0
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#define SMT_TYPE 1
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#define CORE_TYPE 2
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#define DIE_TYPE 5
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#define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff)
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#define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f)
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#define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff)
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unsigned int __max_die_per_package __read_mostly = 1;
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EXPORT_SYMBOL(__max_die_per_package);
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#ifdef CONFIG_SMP
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/*
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* Check if given CPUID extended toplogy "leaf" is implemented
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*/
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static int check_extended_topology_leaf(int leaf)
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{
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unsigned int eax, ebx, ecx, edx;
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cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
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if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
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return -1;
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return 0;
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}
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/*
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* Return best CPUID Extended Toplogy Leaf supported
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*/
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static int detect_extended_topology_leaf(struct cpuinfo_x86 *c)
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{
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if (c->cpuid_level >= 0x1f) {
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if (check_extended_topology_leaf(0x1f) == 0)
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return 0x1f;
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}
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if (c->cpuid_level >= 0xb) {
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if (check_extended_topology_leaf(0xb) == 0)
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return 0xb;
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}
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return -1;
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}
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#endif
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int detect_extended_topology_early(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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unsigned int eax, ebx, ecx, edx;
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int leaf;
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leaf = detect_extended_topology_leaf(c);
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if (leaf < 0)
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return -1;
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set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
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cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
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/*
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* initial apic id, which also represents 32-bit extended x2apic id.
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*/
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c->initial_apicid = edx;
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smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
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#endif
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return 0;
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}
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/*
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* Check for extended topology enumeration cpuid leaf, and if it
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* exists, use it for populating initial_apicid and cpu topology
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* detection.
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*/
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int detect_extended_topology(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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unsigned int eax, ebx, ecx, edx, sub_index;
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unsigned int ht_mask_width, core_plus_mask_width, die_plus_mask_width;
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unsigned int core_select_mask, core_level_siblings;
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unsigned int die_select_mask, die_level_siblings;
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bool die_level_present = false;
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int leaf;
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leaf = detect_extended_topology_leaf(c);
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if (leaf < 0)
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return -1;
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/*
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* Populate HT related information from sub-leaf level 0.
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*/
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cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
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c->initial_apicid = edx;
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core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
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core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
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die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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sub_index = 1;
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do {
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cpuid_count(leaf, sub_index, &eax, &ebx, &ecx, &edx);
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/*
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* Check for the Core type in the implemented sub leaves.
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*/
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if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
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core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
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core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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die_level_siblings = core_level_siblings;
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die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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}
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if (LEAFB_SUBTYPE(ecx) == DIE_TYPE) {
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die_level_present = true;
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die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
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die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
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}
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sub_index++;
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} while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
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core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
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die_select_mask = (~(-1 << die_plus_mask_width)) >>
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core_plus_mask_width;
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c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid,
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ht_mask_width) & core_select_mask;
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if (die_level_present) {
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c->cpu_die_id = apic->phys_pkg_id(c->initial_apicid,
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core_plus_mask_width) & die_select_mask;
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}
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c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid,
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die_plus_mask_width);
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/*
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* Reinit the apicid, now that we have extended initial_apicid.
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*/
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c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
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c->x86_max_cores = (core_level_siblings / smp_num_siblings);
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__max_die_per_package = (die_level_siblings / core_level_siblings);
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#endif
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return 0;
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}
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