190 lines
5.9 KiB
C
190 lines
5.9 KiB
C
#ifndef _PPC64_PTRACE_H
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#define _PPC64_PTRACE_H
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/*
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* Copyright (C) 2001 PPC64 Team, IBM Corp
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*
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* This struct defines the way the registers are stored on the
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* kernel stack during a system call or other kernel entry.
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*
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* this should only contain volatile regs
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* since we can keep non-volatile in the thread_struct
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* should set this up when only volatiles are saved
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* by intr code.
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*
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* Since this is going on the stack, *CARE MUST BE TAKEN* to insure
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* that the overall structure is a multiple of 16 bytes in length.
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*
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* Note that the offsets of the fields in this struct correspond with
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* the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASSEMBLY__
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#define PPC_REG unsigned long
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struct pt_regs {
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PPC_REG gpr[32];
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PPC_REG nip;
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PPC_REG msr;
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PPC_REG orig_gpr3; /* Used for restarting system calls */
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PPC_REG ctr;
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PPC_REG link;
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PPC_REG xer;
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PPC_REG ccr;
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PPC_REG softe; /* Soft enabled/disabled */
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PPC_REG trap; /* Reason for being here */
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PPC_REG dar; /* Fault registers */
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PPC_REG dsisr;
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PPC_REG result; /* Result of a system call */
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};
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#define PPC_REG_32 unsigned int
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struct pt_regs32 {
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PPC_REG_32 gpr[32];
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PPC_REG_32 nip;
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PPC_REG_32 msr;
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PPC_REG_32 orig_gpr3; /* Used for restarting system calls */
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PPC_REG_32 ctr;
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PPC_REG_32 link;
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PPC_REG_32 xer;
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PPC_REG_32 ccr;
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PPC_REG_32 mq; /* 601 only (not used at present) */
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/* Used on APUS to hold IPL value. */
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PPC_REG_32 trap; /* Reason for being here */
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PPC_REG_32 dar; /* Fault registers */
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PPC_REG_32 dsisr;
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PPC_REG_32 result; /* Result of a system call */
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};
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#define instruction_pointer(regs) ((regs)->nip)
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *regs);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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#endif /* __ASSEMBLY__ */
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#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
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/* Size of dummy stack frame allocated when calling signal handler. */
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#define __SIGNAL_FRAMESIZE 128
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#define __SIGNAL_FRAMESIZE32 64
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#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
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#define force_successful_syscall_return() \
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(current_thread_info()->syscall_noerror = 1)
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/*
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* We use the least-significant bit of the trap field to indicate
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* whether we have saved the full set of registers, or only a
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* partial set. A 1 there means the partial set.
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*/
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#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
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#define TRAP(regs) ((regs)->trap & ~0xF)
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#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
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/*
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* Offsets used by 'ptrace' system call interface.
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*/
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#define PT_R0 0
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#define PT_R1 1
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#define PT_R2 2
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#define PT_R3 3
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#define PT_R4 4
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#define PT_R5 5
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#define PT_R6 6
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#define PT_R7 7
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#define PT_R8 8
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#define PT_R9 9
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#define PT_R10 10
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#define PT_R11 11
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#define PT_R12 12
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#define PT_R13 13
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#define PT_R14 14
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#define PT_R15 15
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#define PT_R16 16
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#define PT_R17 17
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#define PT_R18 18
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#define PT_R19 19
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#define PT_R20 20
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#define PT_R21 21
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#define PT_R22 22
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#define PT_R23 23
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#define PT_R24 24
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#define PT_R25 25
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#define PT_R26 26
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#define PT_R27 27
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#define PT_R28 28
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#define PT_R29 29
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#define PT_R30 30
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#define PT_R31 31
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#define PT_NIP 32
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#define PT_MSR 33
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#ifdef __KERNEL__
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#define PT_ORIG_R3 34
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#endif
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#define PT_CTR 35
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#define PT_LNK 36
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#define PT_XER 37
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#define PT_CCR 38
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#define PT_SOFTE 39
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#define PT_RESULT 43
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#define PT_FPR0 48
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/* Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will have
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* visibility to the asm-ppc/ptrace.h header instead of this one.
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*/
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#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
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#ifdef __KERNEL__
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#define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
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#endif
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#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
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#define PT_VSCR (PT_VR0 + 32*2 + 1)
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#define PT_VRSAVE (PT_VR0 + 33*2)
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#ifdef __KERNEL__
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#define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
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#define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
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#define PT_VRSAVE_32 (PT_VR0 + 33*4)
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#endif
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/*
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* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
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* The transfer totals 34 quadword. Quadwords 0-31 contain the
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* corresponding vector registers. Quadword 32 contains the vscr as the
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* last word (offset 12) within that quadword. Quadword 33 contains the
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* vrsave as the first word (offset 0) within the quadword.
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*
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* This definition of the VMX state is compatible with the current PPC32
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* ptrace interface. This allows signal handling and ptrace to use the same
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* structures. This also simplifies the implementation of a bi-arch
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* (combined (32- and 64-bit) gdb.
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*/
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#define PTRACE_GETVRREGS 18
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#define PTRACE_SETVRREGS 19
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/* Additional PTRACE requests implemented on PowerPC. */
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#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
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#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
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#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
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#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
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#define PPC_PTRACE_PEEKTEXT_3264 0x95 /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
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#define PPC_PTRACE_PEEKDATA_3264 0x94 /* Read word at location ADDR on a 64-bit process from a 32-bit process. */
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#define PPC_PTRACE_POKETEXT_3264 0x93 /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
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#define PPC_PTRACE_POKEDATA_3264 0x92 /* Write word at location ADDR on a 64-bit process from a 32-bit process. */
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#define PPC_PTRACE_PEEKUSR_3264 0x91 /* Read a register (specified by ADDR) out of the "user area" on a 64-bit process from a 32-bit process. */
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#define PPC_PTRACE_POKEUSR_3264 0x90 /* Write DATA into location ADDR within the "user area" on a 64-bit process from a 32-bit process. */
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#endif /* _PPC64_PTRACE_H */
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