392 lines
11 KiB
C
392 lines
11 KiB
C
/*
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* OMAP2+ common Clock Management (CM) IP block functions
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* XXX This code should eventually be moved to a CM driver.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/bug.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "cm2xxx.h"
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#include "cm3xxx.h"
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#include "cm33xx.h"
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#include "cm44xx.h"
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#include "clock.h"
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/*
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* cm_ll_data: function pointers to SoC-specific implementations of
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* common CM functions
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*/
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static struct cm_ll_data null_cm_ll_data;
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static const struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
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/* cm_base: base virtual address of the CM IP block */
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struct omap_domain_base cm_base;
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/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
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struct omap_domain_base cm2_base;
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#define CM_NO_CLOCKS 0x1
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#define CM_SINGLE_INSTANCE 0x2
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/**
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* omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
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* @cm: CM base virtual address
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* @cm2: CM2 base virtual address (if present on the booted SoC)
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*
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* XXX Will be replaced when the PRM/CM drivers are completed.
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*/
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void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
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{
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cm_base.va = cm;
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cm2_base.va = cm2;
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}
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/**
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* cm_split_idlest_reg - split CM_IDLEST reg addr into its components
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* @idlest_reg: CM_IDLEST* virtual address
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* @prcm_inst: pointer to an s16 to return the PRCM instance offset
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* @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
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*
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* Given an absolute CM_IDLEST register address @idlest_reg, passes
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* the PRCM instance offset and IDLEST register ID back to the caller
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* via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
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* or 0 upon success. XXX This function is only needed until absolute
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* register addresses are removed from the OMAP struct clk records.
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*/
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int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
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u8 *idlest_reg_id)
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{
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int ret;
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if (!cm_ll_data->split_idlest_reg) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return -EINVAL;
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}
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ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
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idlest_reg_id);
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*prcm_inst -= cm_base.offset;
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return ret;
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}
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/**
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* omap_cm_wait_module_ready - wait for a module to leave idle or standby
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* @part: PRCM partition
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* @prcm_mod: PRCM module offset
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* @idlest_reg: CM_IDLESTx register
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* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
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*
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* Wait for the PRCM to indicate that the module identified by
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* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
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* success, -EBUSY if the module doesn't enable in time, or -EINVAL if
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* no per-SoC wait_module_ready() function pointer has been registered
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* or if the idlest register is unknown on the SoC.
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*/
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int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
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u8 idlest_shift)
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{
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if (!cm_ll_data->wait_module_ready) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return -EINVAL;
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}
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return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
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idlest_shift);
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}
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/**
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* omap_cm_wait_module_idle - wait for a module to enter idle or standby
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* @part: PRCM partition
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* @prcm_mod: PRCM module offset
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* @idlest_reg: CM_IDLESTx register
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* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
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*
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* Wait for the PRCM to indicate that the module identified by
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* (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return
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* 0 upon success, -EBUSY if the module doesn't enable in time, or
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* -EINVAL if no per-SoC wait_module_idle() function pointer has been
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* registered or if the idlest register is unknown on the SoC.
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*/
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int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
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u8 idlest_shift)
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{
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if (!cm_ll_data->wait_module_idle) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return -EINVAL;
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}
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return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
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idlest_shift);
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}
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/**
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* omap_cm_module_enable - enable a module
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* @mode: target mode for the module
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* @part: PRCM partition
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* @inst: PRCM instance
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* @clkctrl_offs: CM_CLKCTRL register offset for the module
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*
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* Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
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* making its IO space accessible. Return 0 upon success, -EINVAL if no
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* per-SoC module_enable() function pointer has been registered.
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*/
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int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
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{
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if (!cm_ll_data->module_enable) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return -EINVAL;
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}
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cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
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return 0;
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}
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/**
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* omap_cm_module_disable - disable a module
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* @part: PRCM partition
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* @inst: PRCM instance
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* @clkctrl_offs: CM_CLKCTRL register offset for the module
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*
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* Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
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* makings its IO space inaccessible. Return 0 upon success, -EINVAL if
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* no per-SoC module_disable() function pointer has been registered.
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*/
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int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
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{
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if (!cm_ll_data->module_disable) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return -EINVAL;
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}
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cm_ll_data->module_disable(part, inst, clkctrl_offs);
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return 0;
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}
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u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs)
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{
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if (!cm_ll_data->xlate_clkctrl) {
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WARN_ONCE(1, "cm: %s: no low-level function defined\n",
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__func__);
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return 0;
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}
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return cm_ll_data->xlate_clkctrl(part, inst, clkctrl_offs);
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}
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/**
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* cm_register - register per-SoC low-level data with the CM
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* @cld: low-level per-SoC OMAP CM data & function pointers to register
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*
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* Register per-SoC low-level OMAP CM data and function pointers with
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* the OMAP CM common interface. The caller must keep the data
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* pointed to by @cld valid until it calls cm_unregister() and
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* it returns successfully. Returns 0 upon success, -EINVAL if @cld
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* is NULL, or -EEXIST if cm_register() has already been called
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* without an intervening cm_unregister().
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*/
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int cm_register(const struct cm_ll_data *cld)
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{
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if (!cld)
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return -EINVAL;
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if (cm_ll_data != &null_cm_ll_data)
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return -EEXIST;
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cm_ll_data = cld;
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return 0;
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}
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/**
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* cm_unregister - unregister per-SoC low-level data & function pointers
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* @cld: low-level per-SoC OMAP CM data & function pointers to unregister
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*
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* Unregister per-SoC low-level OMAP CM data and function pointers
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* that were previously registered with cm_register(). The
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* caller may not destroy any of the data pointed to by @cld until
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* this function returns successfully. Returns 0 upon success, or
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* -EINVAL if @cld is NULL or if @cld does not match the struct
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* cm_ll_data * previously registered by cm_register().
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*/
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int cm_unregister(const struct cm_ll_data *cld)
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{
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if (!cld || cm_ll_data != cld)
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return -EINVAL;
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cm_ll_data = &null_cm_ll_data;
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return 0;
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}
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
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defined(CONFIG_SOC_DRA7XX)
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static struct omap_prcm_init_data cm_data __initdata = {
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.index = TI_CLKM_CM,
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.init = omap4_cm_init,
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};
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static struct omap_prcm_init_data cm2_data __initdata = {
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.index = TI_CLKM_CM2,
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.init = omap4_cm_init,
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP2
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static struct omap_prcm_init_data omap2_prcm_data __initdata = {
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.index = TI_CLKM_CM,
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.init = omap2xxx_cm_init,
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.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static struct omap_prcm_init_data omap3_cm_data __initdata = {
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.index = TI_CLKM_CM,
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.init = omap3xxx_cm_init,
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.flags = CM_SINGLE_INSTANCE,
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/*
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* IVA2 offset is a negative value, must offset the cm_base address
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* by this to get it to positive side on the iomap
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*/
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.offset = -OMAP3430_IVA2_MOD,
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};
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#endif
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#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
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static struct omap_prcm_init_data am3_prcm_data __initdata = {
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.index = TI_CLKM_CM,
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.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
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.init = am33xx_cm_init,
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};
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#endif
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#ifdef CONFIG_SOC_AM43XX
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static struct omap_prcm_init_data am4_prcm_data __initdata = {
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.index = TI_CLKM_CM,
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.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
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.init = omap4_cm_init,
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};
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#endif
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static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
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#ifdef CONFIG_ARCH_OMAP2
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{ .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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{ .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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{ .compatible = "ti,omap4-cm1", .data = &cm_data },
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{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
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#endif
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#ifdef CONFIG_SOC_OMAP5
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{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
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{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
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#endif
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#ifdef CONFIG_SOC_AM33XX
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{ .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
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#endif
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#ifdef CONFIG_SOC_AM43XX
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{ .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
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#endif
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#ifdef CONFIG_SOC_TI81XX
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{ .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
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{ .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
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#endif
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{ }
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};
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/**
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* omap2_cm_base_init - initialize iomappings for the CM drivers
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*
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* Detects and initializes the iomappings for the CM driver, based
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* on the DT data. Returns 0 in success, negative error value
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* otherwise.
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*/
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int __init omap2_cm_base_init(void)
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{
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struct device_node *np;
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const struct of_device_id *match;
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struct omap_prcm_init_data *data;
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struct resource res;
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int ret;
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struct omap_domain_base *mem = NULL;
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for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
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data = (struct omap_prcm_init_data *)match->data;
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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return ret;
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if (data->index == TI_CLKM_CM)
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mem = &cm_base;
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if (data->index == TI_CLKM_CM2)
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mem = &cm2_base;
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data->mem = ioremap(res.start, resource_size(&res));
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if (mem) {
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mem->pa = res.start + data->offset;
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mem->va = data->mem + data->offset;
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mem->offset = data->offset;
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}
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data->np = np;
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if (data->init && (data->flags & CM_SINGLE_INSTANCE ||
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(cm_base.va && cm2_base.va)))
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data->init(data);
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}
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return 0;
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}
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/**
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* omap_cm_init - low level init for the CM drivers
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*
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* Initializes the low level clock infrastructure for CM drivers.
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* Returns 0 in success, negative error value in failure.
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*/
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int __init omap_cm_init(void)
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{
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struct device_node *np;
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const struct of_device_id *match;
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const struct omap_prcm_init_data *data;
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int ret;
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for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
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data = match->data;
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if (data->flags & CM_NO_CLOCKS)
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continue;
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ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
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if (ret)
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return ret;
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}
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return 0;
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}
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