399 lines
10 KiB
C
399 lines
10 KiB
C
/*
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* Linux driver attachment glue for PCI based U320 controllers.
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*
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* Copyright (c) 2000-2001 Adaptec Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
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*/
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#include "aic79xx_osm.h"
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#include "aic79xx_inline.h"
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#include "aic79xx_pci.h"
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/* Define the macro locally since it's different for different class of chips.
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*/
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#define ID(x) \
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ID2C(x), \
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ID2C(IDIROC(x))
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static const struct pci_device_id ahd_linux_pci_id_table[] = {
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/* aic7901 based controllers */
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ID(ID_AHA_29320A),
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ID(ID_AHA_29320ALP),
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ID(ID_AHA_29320LPE),
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/* aic7902 based controllers */
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ID(ID_AHA_29320),
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ID(ID_AHA_29320B),
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ID(ID_AHA_29320LP),
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ID(ID_AHA_39320),
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ID(ID_AHA_39320_B),
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ID(ID_AHA_39320A),
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ID(ID_AHA_39320D),
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ID(ID_AHA_39320D_HP),
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ID(ID_AHA_39320D_B),
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ID(ID_AHA_39320D_B_HP),
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/* Generic chip probes for devices we don't know exactly. */
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ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
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ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
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ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
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{ 0 }
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};
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MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
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#ifdef CONFIG_PM
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static int
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ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
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{
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struct ahd_softc *ahd = pci_get_drvdata(pdev);
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int rc;
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if ((rc = ahd_suspend(ahd)))
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return rc;
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ahd_pci_suspend(ahd);
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pci_save_state(pdev);
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pci_disable_device(pdev);
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if (mesg.event & PM_EVENT_SLEEP)
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pci_set_power_state(pdev, PCI_D3hot);
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return rc;
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}
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static int
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ahd_linux_pci_dev_resume(struct pci_dev *pdev)
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{
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struct ahd_softc *ahd = pci_get_drvdata(pdev);
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int rc;
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pci_set_power_state(pdev, PCI_D0);
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pci_restore_state(pdev);
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if ((rc = pci_enable_device(pdev))) {
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dev_printk(KERN_ERR, &pdev->dev,
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"failed to enable device after resume (%d)\n", rc);
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return rc;
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}
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pci_set_master(pdev);
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ahd_pci_resume(ahd);
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ahd_resume(ahd);
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return rc;
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}
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#endif
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static void
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ahd_linux_pci_dev_remove(struct pci_dev *pdev)
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{
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struct ahd_softc *ahd = pci_get_drvdata(pdev);
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u_long s;
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if (ahd->platform_data && ahd->platform_data->host)
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scsi_remove_host(ahd->platform_data->host);
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ahd_lock(ahd, &s);
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ahd_intr_enable(ahd, FALSE);
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ahd_unlock(ahd, &s);
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ahd_free(ahd);
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}
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static void
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ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
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{
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struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
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unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
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master_pdev = pci_get_slot(pdev->bus, master_devfn);
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if (master_pdev) {
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struct ahd_softc *master = pci_get_drvdata(master_pdev);
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if (master) {
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ahd->flags &= ~AHD_BIOS_ENABLED;
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ahd->flags |= master->flags & AHD_BIOS_ENABLED;
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} else
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printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
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pci_dev_put(master_pdev);
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}
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}
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static int
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ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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char buf[80];
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struct ahd_softc *ahd;
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ahd_dev_softc_t pci;
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const struct ahd_pci_identity *entry;
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char *name;
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int error;
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struct device *dev = &pdev->dev;
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pci = pdev;
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entry = ahd_find_pci_device(pci);
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if (entry == NULL)
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return (-ENODEV);
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/*
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* Allocate a softc for this card and
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* set it up for attachment by our
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* common detect routine.
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*/
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sprintf(buf, "ahd_pci:%d:%d:%d",
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ahd_get_pci_bus(pci),
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ahd_get_pci_slot(pci),
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ahd_get_pci_function(pci));
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name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
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if (name == NULL)
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return (-ENOMEM);
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strcpy(name, buf);
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ahd = ahd_alloc(NULL, name);
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if (ahd == NULL)
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return (-ENOMEM);
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if (pci_enable_device(pdev)) {
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ahd_free(ahd);
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return (-ENODEV);
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}
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pci_set_master(pdev);
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if (sizeof(dma_addr_t) > 4) {
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const u64 required_mask = dma_get_required_mask(dev);
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if (required_mask > DMA_BIT_MASK(39) &&
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dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
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ahd->flags |= AHD_64BIT_ADDRESSING;
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else if (required_mask > DMA_BIT_MASK(32) &&
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dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
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ahd->flags |= AHD_39BIT_ADDRESSING;
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else
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dma_set_mask(dev, DMA_BIT_MASK(32));
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} else {
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dma_set_mask(dev, DMA_BIT_MASK(32));
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}
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ahd->dev_softc = pci;
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error = ahd_pci_config(ahd, entry);
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if (error != 0) {
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ahd_free(ahd);
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return (-error);
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}
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/*
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* Second Function PCI devices need to inherit some
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* * settings from function 0.
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*/
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if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
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ahd_linux_pci_inherit_flags(ahd);
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pci_set_drvdata(pdev, ahd);
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ahd_linux_register_host(ahd, &aic79xx_driver_template);
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return (0);
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}
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static struct pci_driver aic79xx_pci_driver = {
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.name = "aic79xx",
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.probe = ahd_linux_pci_dev_probe,
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#ifdef CONFIG_PM
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.suspend = ahd_linux_pci_dev_suspend,
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.resume = ahd_linux_pci_dev_resume,
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#endif
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.remove = ahd_linux_pci_dev_remove,
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.id_table = ahd_linux_pci_id_table
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};
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int
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ahd_linux_pci_init(void)
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{
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return pci_register_driver(&aic79xx_pci_driver);
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}
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void
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ahd_linux_pci_exit(void)
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{
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pci_unregister_driver(&aic79xx_pci_driver);
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}
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static int
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ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
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resource_size_t *base2)
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{
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*base = pci_resource_start(ahd->dev_softc, 0);
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/*
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* This is really the 3rd bar and should be at index 2,
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* but the Linux PCI code doesn't know how to "count" 64bit
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* bars.
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*/
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*base2 = pci_resource_start(ahd->dev_softc, 3);
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if (*base == 0 || *base2 == 0)
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return (ENOMEM);
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if (!request_region(*base, 256, "aic79xx"))
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return (ENOMEM);
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if (!request_region(*base2, 256, "aic79xx")) {
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release_region(*base, 256);
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return (ENOMEM);
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}
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return (0);
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}
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static int
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ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
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resource_size_t *bus_addr,
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uint8_t __iomem **maddr)
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{
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resource_size_t start;
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resource_size_t base_page;
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u_long base_offset;
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int error = 0;
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if (aic79xx_allow_memio == 0)
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return (ENOMEM);
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if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
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return (ENOMEM);
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start = pci_resource_start(ahd->dev_softc, 1);
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base_page = start & PAGE_MASK;
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base_offset = start - base_page;
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if (start != 0) {
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*bus_addr = start;
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if (!request_mem_region(start, 0x1000, "aic79xx"))
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error = ENOMEM;
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if (!error) {
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*maddr = ioremap_nocache(base_page, base_offset + 512);
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if (*maddr == NULL) {
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error = ENOMEM;
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release_mem_region(start, 0x1000);
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} else
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*maddr += base_offset;
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}
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} else
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error = ENOMEM;
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return (error);
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}
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int
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ahd_pci_map_registers(struct ahd_softc *ahd)
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{
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uint32_t command;
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resource_size_t base;
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uint8_t __iomem *maddr;
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int error;
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/*
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* If its allowed, we prefer memory mapped access.
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*/
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command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
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command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
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base = 0;
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maddr = NULL;
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error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
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if (error == 0) {
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ahd->platform_data->mem_busaddr = base;
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ahd->tags[0] = BUS_SPACE_MEMIO;
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ahd->bshs[0].maddr = maddr;
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ahd->tags[1] = BUS_SPACE_MEMIO;
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ahd->bshs[1].maddr = maddr + 0x100;
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ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
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command | PCIM_CMD_MEMEN, 4);
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if (ahd_pci_test_register_access(ahd) != 0) {
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printf("aic79xx: PCI Device %d:%d:%d "
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"failed memory mapped test. Using PIO.\n",
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ahd_get_pci_bus(ahd->dev_softc),
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ahd_get_pci_slot(ahd->dev_softc),
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ahd_get_pci_function(ahd->dev_softc));
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iounmap(maddr);
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release_mem_region(ahd->platform_data->mem_busaddr,
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0x1000);
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ahd->bshs[0].maddr = NULL;
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maddr = NULL;
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} else
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command |= PCIM_CMD_MEMEN;
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} else if (bootverbose) {
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printf("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
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"unavailable. Cannot memory map device.\n",
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ahd_get_pci_bus(ahd->dev_softc),
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ahd_get_pci_slot(ahd->dev_softc),
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ahd_get_pci_function(ahd->dev_softc),
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(unsigned long long)base);
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}
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if (maddr == NULL) {
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resource_size_t base2;
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error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
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if (error == 0) {
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ahd->tags[0] = BUS_SPACE_PIO;
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ahd->tags[1] = BUS_SPACE_PIO;
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ahd->bshs[0].ioport = (u_long)base;
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ahd->bshs[1].ioport = (u_long)base2;
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command |= PCIM_CMD_PORTEN;
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} else {
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printf("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
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"0x%llx unavailable. Cannot map device.\n",
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ahd_get_pci_bus(ahd->dev_softc),
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ahd_get_pci_slot(ahd->dev_softc),
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ahd_get_pci_function(ahd->dev_softc),
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(unsigned long long)base,
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(unsigned long long)base2);
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}
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}
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ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
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return (error);
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}
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int
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ahd_pci_map_int(struct ahd_softc *ahd)
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{
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int error;
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error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
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IRQF_SHARED, "aic79xx", ahd);
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if (!error)
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ahd->platform_data->irq = ahd->dev_softc->irq;
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return (-error);
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}
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void
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ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
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{
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pci_set_power_state(ahd->dev_softc, new_state);
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}
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