618 lines
20 KiB
C
618 lines
20 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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*/
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#ifndef __SOUND_SOC_SOF_PRIV_H
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#define __SOUND_SOC_SOF_PRIV_H
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#include <linux/device.h>
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#include <sound/hdaudio.h>
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#include <sound/sof.h>
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#include <sound/sof/info.h>
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#include <sound/sof/pm.h>
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#include <sound/sof/trace.h>
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#include <uapi/sound/sof/fw.h>
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#include <sound/sof/ext_manifest.h>
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/* debug flags */
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#define SOF_DBG_ENABLE_TRACE BIT(0)
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#define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */
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#define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */
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#define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token
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* 1: override topology
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*/
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#define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines
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* 1: use dynamic pipelines
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*/
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#define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets
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* on primary core
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*/
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#define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */
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#define SOF_DBG_DUMP_REGS BIT(0)
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#define SOF_DBG_DUMP_MBOX BIT(1)
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#define SOF_DBG_DUMP_TEXT BIT(2)
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#define SOF_DBG_DUMP_PCI BIT(3)
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#define SOF_DBG_DUMP_OPTIONAL BIT(4) /* only dump if SOF_DBG_PRINT_ALL_DUMPS is set */
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/* global debug state set by SOF_DBG_ flags */
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extern int sof_core_debug;
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/* max BARs mmaped devices can use */
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#define SND_SOF_BARS 8
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/* time in ms for runtime suspend delay */
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#define SND_SOF_SUSPEND_DELAY_MS 2000
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/* DMA buffer size for trace */
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#define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
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#define SOF_IPC_DSP_REPLY 0
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#define SOF_IPC_HOST_REPLY 1
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/* convenience constructor for DAI driver streams */
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#define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
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{.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
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.rates = srates, .formats = sfmt}
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#define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
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#define ENABLE_DEBUGFS_CACHEBUF \
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(IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
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IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
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/* So far the primary core on all DSPs has ID 0 */
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#define SOF_DSP_PRIMARY_CORE 0
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/* DSP power state */
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enum sof_dsp_power_states {
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SOF_DSP_PM_D0,
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SOF_DSP_PM_D1,
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SOF_DSP_PM_D2,
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SOF_DSP_PM_D3_HOT,
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SOF_DSP_PM_D3,
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SOF_DSP_PM_D3_COLD,
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};
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struct sof_dsp_power_state {
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u32 state;
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u32 substate; /* platform-specific */
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};
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/* System suspend target state */
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enum sof_system_suspend_state {
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SOF_SUSPEND_NONE = 0,
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SOF_SUSPEND_S0IX,
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SOF_SUSPEND_S3,
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};
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enum sof_dfsentry_type {
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SOF_DFSENTRY_TYPE_IOMEM = 0,
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SOF_DFSENTRY_TYPE_BUF,
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};
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enum sof_debugfs_access_type {
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SOF_DEBUGFS_ACCESS_ALWAYS = 0,
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SOF_DEBUGFS_ACCESS_D0_ONLY,
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};
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struct snd_sof_dev;
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struct snd_sof_ipc_msg;
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struct snd_sof_ipc;
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struct snd_sof_debugfs_map;
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struct snd_soc_tplg_ops;
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struct snd_soc_component;
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struct snd_sof_pdata;
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/*
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* SOF DSP HW abstraction operations.
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* Used to abstract DSP HW architecture and any IO busses between host CPU
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* and DSP device(s).
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*/
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struct snd_sof_dsp_ops {
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/* probe/remove/shutdown */
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int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
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int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
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int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
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/* DSP core boot / reset */
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int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
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int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
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int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
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int (*core_power_up)(struct snd_sof_dev *sof_dev,
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unsigned int core_mask); /* optional */
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int (*core_power_down)(struct snd_sof_dev *sof_dev,
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unsigned int core_mask); /* optional */
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/*
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* Register IO: only used by respective drivers themselves,
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* TODO: consider removing these operations and calling respective
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* implementations directly
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*/
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void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
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u32 value); /* optional */
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u32 (*read)(struct snd_sof_dev *sof_dev,
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void __iomem *addr); /* optional */
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void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
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u64 value); /* optional */
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u64 (*read64)(struct snd_sof_dev *sof_dev,
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void __iomem *addr); /* optional */
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/* memcpy IO */
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int (*block_read)(struct snd_sof_dev *sof_dev,
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enum snd_sof_fw_blk_type type, u32 offset,
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void *dest, size_t size); /* mandatory */
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int (*block_write)(struct snd_sof_dev *sof_dev,
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enum snd_sof_fw_blk_type type, u32 offset,
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void *src, size_t size); /* mandatory */
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/* Mailbox IO */
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void (*mailbox_read)(struct snd_sof_dev *sof_dev,
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u32 offset, void *dest,
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size_t size); /* optional */
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void (*mailbox_write)(struct snd_sof_dev *sof_dev,
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u32 offset, void *src,
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size_t size); /* optional */
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/* doorbell */
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irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
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irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
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/* ipc */
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int (*send_msg)(struct snd_sof_dev *sof_dev,
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struct snd_sof_ipc_msg *msg); /* mandatory */
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/* FW loading */
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int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
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int (*load_module)(struct snd_sof_dev *sof_dev,
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struct snd_sof_mod_hdr *hdr); /* optional */
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/*
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* FW ready checks for ABI compatibility and creates
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* memory windows at first boot
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*/
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int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
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/* connect pcm substream to a host stream */
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int (*pcm_open)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream); /* optional */
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/* disconnect pcm substream to a host stream */
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int (*pcm_close)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream); /* optional */
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/* host stream hw params */
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int (*pcm_hw_params)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct sof_ipc_stream_params *ipc_params); /* optional */
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/* host stream hw_free */
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int (*pcm_hw_free)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream); /* optional */
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/* host stream trigger */
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int (*pcm_trigger)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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int cmd); /* optional */
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/* host stream pointer */
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snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream); /* optional */
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
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/* Except for probe_pointer, all probe ops are mandatory */
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int (*probe_assign)(struct snd_sof_dev *sdev,
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struct snd_compr_stream *cstream,
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struct snd_soc_dai *dai); /* mandatory */
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int (*probe_free)(struct snd_sof_dev *sdev,
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struct snd_compr_stream *cstream,
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struct snd_soc_dai *dai); /* mandatory */
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int (*probe_set_params)(struct snd_sof_dev *sdev,
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struct snd_compr_stream *cstream,
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struct snd_compr_params *params,
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struct snd_soc_dai *dai); /* mandatory */
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int (*probe_trigger)(struct snd_sof_dev *sdev,
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struct snd_compr_stream *cstream, int cmd,
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struct snd_soc_dai *dai); /* mandatory */
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int (*probe_pointer)(struct snd_sof_dev *sdev,
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struct snd_compr_stream *cstream,
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struct snd_compr_tstamp *tstamp,
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struct snd_soc_dai *dai); /* optional */
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#endif
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/* host read DSP stream data */
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int (*ipc_msg_data)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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void *p, size_t sz); /* mandatory */
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/* host configure DSP HW parameters */
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int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
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/* pre/post firmware run */
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int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
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int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
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/* parse platform specific extended manifest, optional */
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int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
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const struct sof_ext_man_elem_header *hdr);
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/* DSP PM */
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int (*suspend)(struct snd_sof_dev *sof_dev,
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u32 target_state); /* optional */
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int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
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int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
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int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
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int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
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int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
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int (*set_power_state)(struct snd_sof_dev *sdev,
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const struct sof_dsp_power_state *target_state); /* optional */
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/* DSP clocking */
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int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
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/* debug */
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const struct snd_sof_debugfs_map *debug_map; /* optional */
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int debug_map_count; /* optional */
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void (*dbg_dump)(struct snd_sof_dev *sof_dev,
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u32 flags); /* optional */
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void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
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int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
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enum snd_sof_fw_blk_type blk_type, u32 offset,
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size_t size, const char *name,
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enum sof_debugfs_access_type access_type); /* optional */
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/* host DMA trace initialization */
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int (*trace_init)(struct snd_sof_dev *sdev,
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u32 *stream_tag); /* optional */
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int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
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int (*trace_trigger)(struct snd_sof_dev *sdev,
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int cmd); /* optional */
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/* misc */
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int (*get_bar_index)(struct snd_sof_dev *sdev,
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u32 type); /* optional */
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int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
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int (*get_window_offset)(struct snd_sof_dev *sdev,
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u32 id);/* mandatory for common loader code */
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/* machine driver ops */
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int (*machine_register)(struct snd_sof_dev *sdev,
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void *pdata); /* optional */
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void (*machine_unregister)(struct snd_sof_dev *sdev,
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void *pdata); /* optional */
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void (*machine_select)(struct snd_sof_dev *sdev); /* optional */
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void (*set_mach_params)(const struct snd_soc_acpi_mach *mach,
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struct snd_sof_dev *sdev); /* optional */
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/* DAI ops */
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struct snd_soc_dai_driver *drv;
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int num_drv;
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/* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
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u32 hw_info;
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const struct dsp_arch_ops *dsp_arch_ops;
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};
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/* DSP architecture specific callbacks for oops and stack dumps */
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struct dsp_arch_ops {
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void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops);
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void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops,
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u32 *stack, u32 stack_words);
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};
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#define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
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/* FS entry for debug files that can expose DSP memories, registers */
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struct snd_sof_dfsentry {
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size_t size;
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size_t buf_data_size; /* length of buffered data for file read operation */
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enum sof_dfsentry_type type;
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/*
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* access_type specifies if the
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* memory -> DSP resource (memory, register etc) is always accessible
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* or if it is accessible only when the DSP is in D0.
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*/
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enum sof_debugfs_access_type access_type;
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#if ENABLE_DEBUGFS_CACHEBUF
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char *cache_buf; /* buffer to cache the contents of debugfs memory */
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#endif
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struct snd_sof_dev *sdev;
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struct list_head list; /* list in sdev dfsentry list */
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union {
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void __iomem *io_mem;
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void *buf;
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};
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};
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/* Debug mapping for any DSP memory or registers that can used for debug */
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struct snd_sof_debugfs_map {
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const char *name;
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u32 bar;
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u32 offset;
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u32 size;
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/*
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* access_type specifies if the memory is always accessible
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* or if it is accessible only when the DSP is in D0.
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*/
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enum sof_debugfs_access_type access_type;
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};
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/* mailbox descriptor, used for host <-> DSP IPC */
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struct snd_sof_mailbox {
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u32 offset;
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size_t size;
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};
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/* IPC message descriptor for host <-> DSP IO */
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struct snd_sof_ipc_msg {
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/* message data */
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u32 header;
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void *msg_data;
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void *reply_data;
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size_t msg_size;
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size_t reply_size;
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int reply_error;
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wait_queue_head_t waitq;
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bool ipc_complete;
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};
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enum snd_sof_fw_state {
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SOF_FW_BOOT_NOT_STARTED = 0,
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SOF_FW_BOOT_PREPARE,
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SOF_FW_BOOT_IN_PROGRESS,
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SOF_FW_BOOT_FAILED,
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SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */
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SOF_FW_BOOT_COMPLETE,
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};
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/*
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* SOF Device Level.
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*/
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struct snd_sof_dev {
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struct device *dev;
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spinlock_t ipc_lock; /* lock for IPC users */
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spinlock_t hw_lock; /* lock for HW IO access */
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/*
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* ASoC components. plat_drv fields are set dynamically so
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* can't use const
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*/
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struct snd_soc_component_driver plat_drv;
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/* current DSP power state */
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struct sof_dsp_power_state dsp_power_state;
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/* mutex to protect the dsp_power_state access */
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struct mutex power_state_access;
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/* Intended power target of system suspend */
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enum sof_system_suspend_state system_suspend_target;
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/* DSP firmware boot */
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wait_queue_head_t boot_wait;
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enum snd_sof_fw_state fw_state;
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bool first_boot;
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/* work queue in case the probe is implemented in two steps */
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struct work_struct probe_work;
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bool probe_completed;
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/* DSP HW differentiation */
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struct snd_sof_pdata *pdata;
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/* IPC */
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struct snd_sof_ipc *ipc;
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struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
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struct snd_sof_mailbox host_box; /* Host initiated IPC */
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struct snd_sof_mailbox stream_box; /* Stream position update */
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struct snd_sof_mailbox debug_box; /* Debug info updates */
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struct snd_sof_ipc_msg *msg;
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int ipc_irq;
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u32 next_comp_id; /* monotonic - reset during S3 */
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/* memory bases for mmaped DSPs - set by dsp_init() */
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void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
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int mmio_bar;
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int mailbox_bar;
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size_t dsp_oops_offset;
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/* debug */
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struct dentry *debugfs_root;
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struct list_head dfsentry_list;
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bool dbg_dump_printed;
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bool ipc_dump_printed;
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/* firmware loader */
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struct snd_dma_buffer dmab;
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struct snd_dma_buffer dmab_bdl;
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struct sof_ipc_fw_ready fw_ready;
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struct sof_ipc_fw_version fw_version;
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struct sof_ipc_cc_version *cc_version;
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/* topology */
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struct snd_soc_tplg_ops *tplg_ops;
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struct list_head pcm_list;
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struct list_head kcontrol_list;
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struct list_head widget_list;
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struct list_head dai_list;
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struct list_head route_list;
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struct snd_soc_component *component;
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u32 enabled_cores_mask; /* keep track of enabled cores */
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/* FW configuration */
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struct sof_ipc_window *info_window;
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/* IPC timeouts in ms */
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int ipc_timeout;
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int boot_timeout;
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
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unsigned int extractor_stream_tag;
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#endif
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|
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/* DMA for Trace */
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struct snd_dma_buffer dmatb;
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struct snd_dma_buffer dmatp;
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int dma_trace_pages;
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wait_queue_head_t trace_sleep;
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u32 host_offset;
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bool dtrace_is_supported; /* set with Kconfig or module parameter */
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bool dtrace_is_enabled;
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bool dtrace_error;
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bool dtrace_draining;
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bool msi_enabled;
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void *private; /* core does not touch this */
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};
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/*
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* Device Level.
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*/
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|
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int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
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int snd_sof_device_remove(struct device *dev);
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int snd_sof_device_shutdown(struct device *dev);
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bool snd_sof_device_probe_completed(struct device *dev);
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int snd_sof_runtime_suspend(struct device *dev);
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int snd_sof_runtime_resume(struct device *dev);
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int snd_sof_runtime_idle(struct device *dev);
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int snd_sof_resume(struct device *dev);
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int snd_sof_suspend(struct device *dev);
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int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
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int snd_sof_prepare(struct device *dev);
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void snd_sof_complete(struct device *dev);
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void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
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|
|
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int snd_sof_create_page_table(struct device *dev,
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struct snd_dma_buffer *dmab,
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|
unsigned char *page_table, size_t size);
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|
|
|
/*
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|
* Firmware loading.
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|
*/
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int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
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int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
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|
int snd_sof_run_firmware(struct snd_sof_dev *sdev);
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int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
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struct snd_sof_mod_hdr *module);
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void snd_sof_fw_unload(struct snd_sof_dev *sdev);
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|
|
|
/*
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* IPC low level APIs.
|
|
*/
|
|
struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
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|
void snd_sof_ipc_free(struct snd_sof_dev *sdev);
|
|
void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
|
|
void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
|
|
int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
|
|
struct sof_ipc_pcm_params *params);
|
|
int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
|
|
int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
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|
void *msg_data, size_t msg_bytes, void *reply_data,
|
|
size_t reply_bytes);
|
|
int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
|
|
void *msg_data, size_t msg_bytes,
|
|
void *reply_data, size_t reply_bytes);
|
|
int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev);
|
|
|
|
/*
|
|
* Trace/debug
|
|
*/
|
|
int snd_sof_init_trace(struct snd_sof_dev *sdev);
|
|
void snd_sof_release_trace(struct snd_sof_dev *sdev);
|
|
void snd_sof_free_trace(struct snd_sof_dev *sdev);
|
|
int snd_sof_dbg_init(struct snd_sof_dev *sdev);
|
|
void snd_sof_free_debug(struct snd_sof_dev *sdev);
|
|
int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
|
|
void *base, size_t size,
|
|
const char *name, mode_t mode);
|
|
int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
|
|
struct sof_ipc_dma_trace_posn *posn);
|
|
void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
|
|
void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code,
|
|
u32 tracep_code, void *oops,
|
|
struct sof_ipc_panic_info *panic_info,
|
|
void *stack, size_t stack_words);
|
|
int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
|
|
void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
|
|
int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
|
|
int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
|
|
enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
|
|
const char *name, enum sof_debugfs_access_type access_type);
|
|
|
|
/*
|
|
* DSP Architectures.
|
|
*/
|
|
static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
|
|
u32 stack_words)
|
|
{
|
|
sof_dsp_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words);
|
|
}
|
|
|
|
static inline void sof_oops(struct snd_sof_dev *sdev, void *oops)
|
|
{
|
|
if (sof_dsp_arch_ops(sdev)->dsp_oops)
|
|
sof_dsp_arch_ops(sdev)->dsp_oops(sdev, oops);
|
|
}
|
|
|
|
extern const struct dsp_arch_ops sof_xtensa_arch_ops;
|
|
|
|
/*
|
|
* Firmware state tracking
|
|
*/
|
|
static inline void sof_set_fw_state(struct snd_sof_dev *sdev,
|
|
enum snd_sof_fw_state new_state)
|
|
{
|
|
if (sdev->fw_state == new_state)
|
|
return;
|
|
|
|
dev_dbg(sdev->dev, "fw_state change: %d -> %d\n", sdev->fw_state, new_state);
|
|
sdev->fw_state = new_state;
|
|
}
|
|
|
|
/*
|
|
* Utilities
|
|
*/
|
|
void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
|
|
void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
|
|
u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
|
|
u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
|
|
void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
|
|
void *message, size_t bytes);
|
|
void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
|
|
void *message, size_t bytes);
|
|
int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
|
|
u32 offset, void *src, size_t size);
|
|
int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
|
|
u32 offset, void *dest, size_t size);
|
|
|
|
int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
|
|
|
|
int sof_ipc_msg_data(struct snd_sof_dev *sdev,
|
|
struct snd_pcm_substream *substream,
|
|
void *p, size_t sz);
|
|
int sof_ipc_pcm_params(struct snd_sof_dev *sdev,
|
|
struct snd_pcm_substream *substream,
|
|
const struct sof_ipc_pcm_params_reply *reply);
|
|
|
|
int sof_stream_pcm_open(struct snd_sof_dev *sdev,
|
|
struct snd_pcm_substream *substream);
|
|
int sof_stream_pcm_close(struct snd_sof_dev *sdev,
|
|
struct snd_pcm_substream *substream);
|
|
|
|
int sof_machine_check(struct snd_sof_dev *sdev);
|
|
#endif
|