OpenCloudOS-Kernel/arch/x86/include
David Woodhouse ab0f59c6f1 x86/apic: Support 15 bits of APIC ID in MSI where available
Some hypervisors can allow the guest to use the Extended Destination ID
field in the MSI address to address up to 32768 CPUs.

This applies to all downstream devices which generate MSI cycles,
including HPET, I/O-APIC and PCI MSI.

HPET and PCI MSI use the same __irq_msi_compose_msg() function, while
I/O-APIC generates its own and had support for the extended bits added in
a previous commit.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-33-dwmw2@infradead.org
2020-10-28 20:26:29 +01:00
..
asm x86/apic: Support 15 bits of APIC ID in MSI where available 2020-10-28 20:26:29 +01:00
uapi/asm x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID 2020-10-28 13:52:05 -04:00