369 lines
9.3 KiB
C
369 lines
9.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* HyperV Detection code.
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*
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* Copyright (C) 2010, Novell, Inc.
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* Author : K. Y. Srinivasan <ksrinivasan@novell.com>
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*/
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#include <linux/types.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/hardirq.h>
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#include <linux/efi.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kexec.h>
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#include <linux/i8253.h>
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#include <linux/random.h>
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#include <asm/processor.h>
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#include <asm/hypervisor.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/mshyperv.h>
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#include <asm/desc.h>
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#include <asm/irq_regs.h>
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#include <asm/i8259.h>
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#include <asm/apic.h>
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#include <asm/timer.h>
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#include <asm/reboot.h>
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#include <asm/nmi.h>
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#include <clocksource/hyperv_timer.h>
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struct ms_hyperv_info ms_hyperv;
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EXPORT_SYMBOL_GPL(ms_hyperv);
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#if IS_ENABLED(CONFIG_HYPERV)
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static void (*vmbus_handler)(void);
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static void (*hv_stimer0_handler)(void);
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static void (*hv_kexec_handler)(void);
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static void (*hv_crash_handler)(struct pt_regs *regs);
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__visible void __irq_entry hyperv_vector_handler(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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entering_irq();
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inc_irq_stat(irq_hv_callback_count);
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if (vmbus_handler)
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vmbus_handler();
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if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
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ack_APIC_irq();
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exiting_irq();
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set_irq_regs(old_regs);
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}
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void hv_setup_vmbus_irq(void (*handler)(void))
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{
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vmbus_handler = handler;
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}
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void hv_remove_vmbus_irq(void)
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{
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/* We have no way to deallocate the interrupt gate */
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vmbus_handler = NULL;
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}
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EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq);
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EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq);
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/*
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* Routines to do per-architecture handling of stimer0
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* interrupts when in Direct Mode
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*/
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__visible void __irq_entry hv_stimer0_vector_handler(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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entering_irq();
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inc_irq_stat(hyperv_stimer0_count);
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if (hv_stimer0_handler)
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hv_stimer0_handler();
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add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0);
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ack_APIC_irq();
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exiting_irq();
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set_irq_regs(old_regs);
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}
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int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void))
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{
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*vector = HYPERV_STIMER0_VECTOR;
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*irq = -1; /* Unused on x86/x64 */
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hv_stimer0_handler = handler;
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return 0;
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}
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EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq);
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void hv_remove_stimer0_irq(int irq)
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{
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/* We have no way to deallocate the interrupt gate */
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hv_stimer0_handler = NULL;
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}
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EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq);
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void hv_setup_kexec_handler(void (*handler)(void))
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{
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hv_kexec_handler = handler;
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}
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EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
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void hv_remove_kexec_handler(void)
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{
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hv_kexec_handler = NULL;
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}
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EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
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void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
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{
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hv_crash_handler = handler;
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}
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EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
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void hv_remove_crash_handler(void)
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{
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hv_crash_handler = NULL;
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}
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EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
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#ifdef CONFIG_KEXEC_CORE
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static void hv_machine_shutdown(void)
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{
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if (kexec_in_progress && hv_kexec_handler)
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hv_kexec_handler();
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native_machine_shutdown();
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}
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static void hv_machine_crash_shutdown(struct pt_regs *regs)
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{
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if (hv_crash_handler)
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hv_crash_handler(regs);
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native_machine_crash_shutdown(regs);
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}
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#endif /* CONFIG_KEXEC_CORE */
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#endif /* CONFIG_HYPERV */
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static uint32_t __init ms_hyperv_platform(void)
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{
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u32 eax;
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u32 hyp_signature[3];
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if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
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return 0;
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cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
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&eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
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if (eax >= HYPERV_CPUID_MIN &&
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eax <= HYPERV_CPUID_MAX &&
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!memcmp("Microsoft Hv", hyp_signature, 12))
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return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
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return 0;
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}
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static unsigned char hv_get_nmi_reason(void)
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{
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return 0;
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
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* it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle
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* unknown NMI on the first CPU which gets it.
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*/
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static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
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{
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static atomic_t nmi_cpu = ATOMIC_INIT(-1);
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if (!unknown_nmi_panic)
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return NMI_DONE;
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if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
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return NMI_HANDLED;
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return NMI_DONE;
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}
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#endif
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static unsigned long hv_get_tsc_khz(void)
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{
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unsigned long freq;
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rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
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return freq / 1000;
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}
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#if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
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static void __init hv_smp_prepare_boot_cpu(void)
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{
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native_smp_prepare_boot_cpu();
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#if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
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hv_init_spinlocks();
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#endif
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}
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#endif
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static void __init ms_hyperv_init_platform(void)
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{
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int hv_host_info_eax;
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int hv_host_info_ebx;
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int hv_host_info_ecx;
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int hv_host_info_edx;
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#ifdef CONFIG_PARAVIRT
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pv_info.name = "Hyper-V";
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#endif
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/*
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* Extract the features and hints
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*/
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ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
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ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
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ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
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pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
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ms_hyperv.features, ms_hyperv.hints);
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ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
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ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
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pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
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ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
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/*
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* Extract host information.
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*/
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if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >=
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HYPERV_CPUID_VERSION) {
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hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
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hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
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hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
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hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
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pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n",
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hv_host_info_eax, hv_host_info_ebx >> 16,
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hv_host_info_ebx & 0xFFFF, hv_host_info_ecx,
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hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
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}
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if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
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ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
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x86_platform.calibrate_tsc = hv_get_tsc_khz;
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x86_platform.calibrate_cpu = hv_get_tsc_khz;
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}
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if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) {
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ms_hyperv.nested_features =
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cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
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ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
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/*
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* Get the APIC frequency.
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*/
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u64 hv_lapic_frequency;
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rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
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hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
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lapic_timer_period = hv_lapic_frequency;
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pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
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lapic_timer_period);
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}
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register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
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"hv_nmi_unknown");
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#endif
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#ifdef CONFIG_X86_IO_APIC
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no_timer_check = 1;
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#endif
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#if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
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machine_ops.shutdown = hv_machine_shutdown;
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machine_ops.crash_shutdown = hv_machine_crash_shutdown;
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#endif
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if (ms_hyperv.features & HV_X64_ACCESS_TSC_INVARIANT) {
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wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1);
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setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
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} else {
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mark_tsc_unstable("running on Hyper-V");
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}
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/*
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* Generation 2 instances don't support reading the NMI status from
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* 0x61 port.
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*/
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if (efi_enabled(EFI_BOOT))
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x86_platform.get_nmi_reason = hv_get_nmi_reason;
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/*
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* Hyper-V VMs have a PIT emulation quirk such that zeroing the
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* counter register during PIT shutdown restarts the PIT. So it
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* continues to interrupt @18.2 HZ. Setting i8253_clear_counter
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* to false tells pit_shutdown() not to zero the counter so that
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* the PIT really is shutdown. Generation 2 VMs don't have a PIT,
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* and setting this value has no effect.
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*/
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i8253_clear_counter_on_shutdown = false;
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#if IS_ENABLED(CONFIG_HYPERV)
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/*
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* Setup the hook to get control post apic initialization.
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*/
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x86_platform.apic_post_init = hyperv_init;
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hyperv_setup_mmu_ops();
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/* Setup the IDT for hypervisor callback */
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alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
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/* Setup the IDT for reenlightenment notifications */
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if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT)
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alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
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hyperv_reenlightenment_vector);
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/* Setup the IDT for stimer0 */
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if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
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alloc_intr_gate(HYPERV_STIMER0_VECTOR,
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hv_stimer0_callback_vector);
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# ifdef CONFIG_SMP
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smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
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# endif
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/*
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* Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
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* set x2apic destination mode to physcial mode when x2apic is available
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* and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
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* have 8-bit APIC id.
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*/
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# ifdef CONFIG_X86_X2APIC
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if (x2apic_supported())
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x2apic_phys = 1;
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# endif
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/* Register Hyper-V specific clocksource */
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hv_init_clocksource();
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#endif
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}
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void hv_setup_sched_clock(void *sched_clock)
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{
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#ifdef CONFIG_PARAVIRT
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pv_ops.time.sched_clock = sched_clock;
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#endif
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}
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const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
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.name = "Microsoft Hyper-V",
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.detect = ms_hyperv_platform,
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.type = X86_HYPER_MS_HYPERV,
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.init.init_platform = ms_hyperv_init_platform,
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};
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