OpenCloudOS-Kernel/arch/x86/events
Zhang Rui 838342a6d6 perf/x86/rapl: Fix psys-energy event on Intel SPR platform
There are several things special for the RAPL Psys energy counter, on
Intel Sapphire Rapids platform.
1. it contains one Psys master package, and only CPUs on the master
   package can read valid value of the Psys energy counter, reading the
   MSR on CPUs in the slave package returns 0.
2. The master package does not have to be Physical package 0. And when
   all the CPUs on the Psys master package are offlined, we lose the Psys
   energy counter, at runtime.
3. The Psys energy counter can be disabled by BIOS, while all the other
   energy counters are not affected.

It is not easy to handle all of these in the current RAPL PMU design
because
a) perf_msr_probe() validates the MSR on some random CPU, which may either
   be in the Psys master package or in the Psys slave package.
b) all the RAPL events share the same PMU, and there is not API to remove
   the psys-energy event cleanly, without affecting the other events in
   the same PMU.

This patch addresses the problems in a simple way.

First,  by setting .no_check bit for RAPL Psys MSR, the psys-energy event
is always added, so we don't have to check the Psys ENERGY_STATUS MSR on
master package.

Then, by removing rapl_not_visible(), the psys-energy event is always
available in sysfs. This does not affect the previous code because, for
the RAPL MSRs with .no_check cleared, the .is_visible() callback is always
overriden in the perf_msr_probe() function.

Note, although RAPL PMU is die-based, and the Psys energy counter MSR on
Intel SPR is package scope, this is not a problem because there is only
one die in each package on SPR.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20210204161816.12649-3-rui.zhang@intel.com
2021-02-10 14:44:55 +01:00
..
amd x86/CPU/AMD: Remove amd_get_nb_id() 2020-11-19 11:43:17 +01:00
intel perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[] 2021-02-10 14:44:54 +01:00
zhaoxin x86/perf: Fix a typo 2020-07-22 10:22:08 +02:00
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile perf/x86/rapl: Fix RAPL config variable bug 2020-06-02 11:52:56 +02:00
core.c perf/x86/intel: Support CPUID 10.ECX to disable fixed counters 2021-02-01 15:31:37 +01:00
msr.c perf/x86/msr: Add Rocket Lake CPU support 2020-10-29 11:00:40 +01:00
perf_event.h perf/x86/intel: Support CPUID 10.ECX to disable fixed counters 2021-02-01 15:31:37 +01:00
probe.c perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
probe.h perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
rapl.c perf/x86/rapl: Fix psys-energy event on Intel SPR platform 2021-02-10 14:44:55 +01:00