243 lines
6.8 KiB
C
243 lines
6.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Based on arch/arm/include/asm/cmpxchg.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_CMPXCHG_H
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#define __ASM_CMPXCHG_H
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#include <linux/build_bug.h>
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#include <linux/compiler.h>
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#include <asm/atomic.h>
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#include <asm/barrier.h>
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#include <asm/lse.h>
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/*
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* We need separate acquire parameters for ll/sc and lse, since the full
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* barrier case is generated as release+dmb for the former and
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* acquire+release for the latter.
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*/
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#define __XCHG_CASE(w, sfx, name, sz, mb, nop_lse, acq, acq_lse, rel, cl) \
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static inline u##sz __xchg_case_##name##sz(u##sz x, volatile void *ptr) \
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{ \
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u##sz ret; \
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unsigned long tmp; \
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\
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asm volatile(ARM64_LSE_ATOMIC_INSN( \
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/* LL/SC */ \
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" prfm pstl1strm, %2\n" \
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"1: ld" #acq "xr" #sfx "\t%" #w "0, %2\n" \
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" st" #rel "xr" #sfx "\t%w1, %" #w "3, %2\n" \
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" cbnz %w1, 1b\n" \
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" " #mb, \
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/* LSE atomics */ \
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" swp" #acq_lse #rel #sfx "\t%" #w "3, %" #w "0, %2\n" \
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__nops(3) \
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" " #nop_lse) \
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: "=&r" (ret), "=&r" (tmp), "+Q" (*(u##sz *)ptr) \
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: "r" (x) \
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: cl); \
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\
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return ret; \
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}
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__XCHG_CASE(w, b, , 8, , , , , , )
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__XCHG_CASE(w, h, , 16, , , , , , )
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__XCHG_CASE(w, , , 32, , , , , , )
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__XCHG_CASE( , , , 64, , , , , , )
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__XCHG_CASE(w, b, acq_, 8, , , a, a, , "memory")
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__XCHG_CASE(w, h, acq_, 16, , , a, a, , "memory")
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__XCHG_CASE(w, , acq_, 32, , , a, a, , "memory")
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__XCHG_CASE( , , acq_, 64, , , a, a, , "memory")
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__XCHG_CASE(w, b, rel_, 8, , , , , l, "memory")
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__XCHG_CASE(w, h, rel_, 16, , , , , l, "memory")
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__XCHG_CASE(w, , rel_, 32, , , , , l, "memory")
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__XCHG_CASE( , , rel_, 64, , , , , l, "memory")
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__XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory")
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__XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory")
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__XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory")
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__XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory")
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#undef __XCHG_CASE
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#define __XCHG_GEN(sfx) \
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static inline unsigned long __xchg##sfx(unsigned long x, \
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volatile void *ptr, \
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int size) \
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{ \
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switch (size) { \
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case 1: \
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return __xchg_case##sfx##_8(x, ptr); \
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case 2: \
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return __xchg_case##sfx##_16(x, ptr); \
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case 4: \
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return __xchg_case##sfx##_32(x, ptr); \
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case 8: \
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return __xchg_case##sfx##_64(x, ptr); \
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default: \
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BUILD_BUG(); \
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} \
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\
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unreachable(); \
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}
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__XCHG_GEN()
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__XCHG_GEN(_acq)
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__XCHG_GEN(_rel)
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__XCHG_GEN(_mb)
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#undef __XCHG_GEN
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#define __xchg_wrapper(sfx, ptr, x) \
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({ \
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__typeof__(*(ptr)) __ret; \
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__ret = (__typeof__(*(ptr))) \
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__xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \
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__ret; \
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})
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/* xchg */
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#define arch_xchg_relaxed(...) __xchg_wrapper( , __VA_ARGS__)
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#define arch_xchg_acquire(...) __xchg_wrapper(_acq, __VA_ARGS__)
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#define arch_xchg_release(...) __xchg_wrapper(_rel, __VA_ARGS__)
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#define arch_xchg(...) __xchg_wrapper( _mb, __VA_ARGS__)
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#define __CMPXCHG_GEN(sfx) \
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static inline unsigned long __cmpxchg##sfx(volatile void *ptr, \
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unsigned long old, \
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unsigned long new, \
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int size) \
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{ \
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switch (size) { \
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case 1: \
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return __cmpxchg_case##sfx##_8(ptr, old, new); \
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case 2: \
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return __cmpxchg_case##sfx##_16(ptr, old, new); \
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case 4: \
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return __cmpxchg_case##sfx##_32(ptr, old, new); \
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case 8: \
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return __cmpxchg_case##sfx##_64(ptr, old, new); \
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default: \
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BUILD_BUG(); \
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} \
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\
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unreachable(); \
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}
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__CMPXCHG_GEN()
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__CMPXCHG_GEN(_acq)
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__CMPXCHG_GEN(_rel)
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__CMPXCHG_GEN(_mb)
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#undef __CMPXCHG_GEN
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#define __cmpxchg_wrapper(sfx, ptr, o, n) \
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({ \
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__typeof__(*(ptr)) __ret; \
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__ret = (__typeof__(*(ptr))) \
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__cmpxchg##sfx((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))); \
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__ret; \
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})
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/* cmpxchg */
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#define arch_cmpxchg_relaxed(...) __cmpxchg_wrapper( , __VA_ARGS__)
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#define arch_cmpxchg_acquire(...) __cmpxchg_wrapper(_acq, __VA_ARGS__)
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#define arch_cmpxchg_release(...) __cmpxchg_wrapper(_rel, __VA_ARGS__)
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#define arch_cmpxchg(...) __cmpxchg_wrapper( _mb, __VA_ARGS__)
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#define arch_cmpxchg_local arch_cmpxchg_relaxed
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/* cmpxchg64 */
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#define arch_cmpxchg64_relaxed arch_cmpxchg_relaxed
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#define arch_cmpxchg64_acquire arch_cmpxchg_acquire
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#define arch_cmpxchg64_release arch_cmpxchg_release
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#define arch_cmpxchg64 arch_cmpxchg
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#define arch_cmpxchg64_local arch_cmpxchg_local
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/* cmpxchg_double */
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#define system_has_cmpxchg_double() 1
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#define __cmpxchg_double_check(ptr1, ptr2) \
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({ \
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if (sizeof(*(ptr1)) != 8) \
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BUILD_BUG(); \
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VM_BUG_ON((unsigned long *)(ptr2) - (unsigned long *)(ptr1) != 1); \
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})
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#define arch_cmpxchg_double(ptr1, ptr2, o1, o2, n1, n2) \
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({ \
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int __ret; \
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__cmpxchg_double_check(ptr1, ptr2); \
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__ret = !__cmpxchg_double_mb((unsigned long)(o1), (unsigned long)(o2), \
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(unsigned long)(n1), (unsigned long)(n2), \
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ptr1); \
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__ret; \
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})
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#define arch_cmpxchg_double_local(ptr1, ptr2, o1, o2, n1, n2) \
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({ \
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int __ret; \
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__cmpxchg_double_check(ptr1, ptr2); \
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__ret = !__cmpxchg_double((unsigned long)(o1), (unsigned long)(o2), \
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(unsigned long)(n1), (unsigned long)(n2), \
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ptr1); \
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__ret; \
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})
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#define __CMPWAIT_CASE(w, sfx, sz) \
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static inline void __cmpwait_case_##sz(volatile void *ptr, \
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unsigned long val) \
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{ \
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unsigned long tmp; \
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\
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asm volatile( \
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" sevl\n" \
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" wfe\n" \
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" ldxr" #sfx "\t%" #w "[tmp], %[v]\n" \
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" eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \
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" cbnz %" #w "[tmp], 1f\n" \
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" wfe\n" \
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"1:" \
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: [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \
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: [val] "r" (val)); \
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}
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__CMPWAIT_CASE(w, b, 8);
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__CMPWAIT_CASE(w, h, 16);
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__CMPWAIT_CASE(w, , 32);
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__CMPWAIT_CASE( , , 64);
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#undef __CMPWAIT_CASE
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#define __CMPWAIT_GEN(sfx) \
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static inline void __cmpwait##sfx(volatile void *ptr, \
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unsigned long val, \
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int size) \
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{ \
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switch (size) { \
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case 1: \
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return __cmpwait_case##sfx##_8(ptr, (u8)val); \
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case 2: \
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return __cmpwait_case##sfx##_16(ptr, (u16)val); \
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case 4: \
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return __cmpwait_case##sfx##_32(ptr, val); \
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case 8: \
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return __cmpwait_case##sfx##_64(ptr, val); \
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default: \
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BUILD_BUG(); \
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} \
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\
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unreachable(); \
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}
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__CMPWAIT_GEN()
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#undef __CMPWAIT_GEN
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#define __cmpwait_relaxed(ptr, val) \
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__cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr)))
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#endif /* __ASM_CMPXCHG_H */
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