106 lines
2.8 KiB
YAML
106 lines
2.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Watchdog Timer
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allOf:
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- $ref: "watchdog.yaml#"
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maintainers:
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- Jamie Iles <jamie@jamieiles.com>
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properties:
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compatible:
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oneOf:
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- const: snps,dw-wdt
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- items:
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- enum:
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- rockchip,px30-wdt
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- rockchip,rk3066-wdt
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- rockchip,rk3188-wdt
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- rockchip,rk3228-wdt
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- rockchip,rk3288-wdt
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- rockchip,rk3308-wdt
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- rockchip,rk3328-wdt
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- rockchip,rk3368-wdt
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- rockchip,rk3399-wdt
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- rockchip,rk3568-wdt
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- rockchip,rv1108-wdt
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- const: snps,dw-wdt
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reg:
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maxItems: 1
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interrupts:
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description: DW Watchdog pre-timeout interrupt
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: Watchdog timer reference clock
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- description: APB3 interface clock
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clock-names:
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minItems: 1
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items:
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- const: tclk
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- const: pclk
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resets:
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description: Phandle to the DW Watchdog reset lane
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maxItems: 1
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snps,watchdog-tops:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs).
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Each TOP is a number loaded into the watchdog counter at the moment of
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the timer restart. The counter decrementing happens each tick of the
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reference clock. Therefore the TOPs array is equivalent to an array of
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the timer expiration intervals supported by the DW APB Watchdog. Note
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DW APB Watchdog IP-core might be synthesized with fixed TOP values,
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in which case this property is unnecessary with default TOPs utilized.
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default: [0x0001000 0x0002000 0x0004000 0x0008000
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0x0010000 0x0020000 0x0040000 0x0080000
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0x0100000 0x0200000 0x0400000 0x0800000
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0x1000000 0x2000000 0x4000000 0x8000000]
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minItems: 16
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maxItems: 16
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- clocks
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examples:
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- |
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watchdog@ffd02000 {
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compatible = "snps,dw-wdt";
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reg = <0xffd02000 0x1000>;
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interrupts = <0 171 4>;
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clocks = <&per_base_clk>;
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resets = <&wdt_rst>;
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};
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- |
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watchdog@ffd02000 {
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compatible = "snps,dw-wdt";
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reg = <0xffd02000 0x1000>;
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interrupts = <0 171 4>;
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clocks = <&per_base_clk>;
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clock-names = "tclk";
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snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
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0x000007FF 0x0000FFFF 0x0001FFFF
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0x0003FFFF 0x0007FFFF 0x000FFFFF
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0x001FFFFF 0x003FFFFF 0x007FFFFF
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0x00FFFFFF 0x01FFFFFF 0x03FFFFFF
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0x07FFFFFF>;
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};
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...
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