294 lines
7.5 KiB
C
294 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* COMEDI driver for generic PCI based 8255 digital i/o boards
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* Copyright (C) 2012 H Hartley Sweeten <hsweeten@visionengravers.com>
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*
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* Based on the tested adl_pci7296 driver written by:
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* Jon Grierson <jd@renko.co.uk>
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* and the experimental cb_pcidio driver written by:
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* Yoshiya Matsuzaka
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 2000 David A. Schleef <ds@schleef.org>
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*/
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/*
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* Driver: 8255_pci
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* Description: Generic PCI based 8255 Digital I/O boards
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* Devices: [ADLink] PCI-7224 (adl_pci-7224), PCI-7248 (adl_pci-7248),
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* PCI-7296 (adl_pci-7296),
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* [Measurement Computing] PCI-DIO24 (cb_pci-dio24),
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* PCI-DIO24H (cb_pci-dio24h), PCI-DIO48H (cb_pci-dio48h),
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* PCI-DIO96H (cb_pci-dio96h),
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* [National Instruments] PCI-DIO-96 (ni_pci-dio-96),
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* PCI-DIO-96B (ni_pci-dio-96b), PXI-6508 (ni_pxi-6508),
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* PCI-6503 (ni_pci-6503), PCI-6503B (ni_pci-6503b),
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* PCI-6503X (ni_pci-6503x), PXI-6503 (ni_pxi-6503)
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* Author: H Hartley Sweeten <hsweeten@visionengravers.com>
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* Updated: Wed, 12 Sep 2012 11:52:01 -0700
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* Status: untested
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*
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* These boards have one or more 8255 digital I/O chips, each of which
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* is supported as a separate 24-channel DIO subdevice.
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*
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* Boards with 24 DIO channels (1 DIO subdevice):
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*
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* PCI-7224, PCI-DIO24, PCI-DIO24H, PCI-6503, PCI-6503B, PCI-6503X,
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* PXI-6503
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*
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* Boards with 48 DIO channels (2 DIO subdevices):
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*
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* PCI-7248, PCI-DIO48H
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*
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* Boards with 96 DIO channels (4 DIO subdevices):
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*
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* PCI-7296, PCI-DIO96H, PCI-DIO-96, PCI-DIO-96B, PXI-6508
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*
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* Some of these boards also have an 8254 programmable timer/counter
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* chip. This chip is not currently supported by this driver.
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*
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* Interrupt support for these boards is also not currently supported.
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*
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* Configuration Options: not applicable, uses PCI auto config.
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*/
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#include <linux/module.h>
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#include <linux/comedi/comedi_pci.h>
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#include <linux/comedi/comedi_8255.h>
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enum pci_8255_boardid {
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BOARD_ADLINK_PCI7224,
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BOARD_ADLINK_PCI7248,
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BOARD_ADLINK_PCI7296,
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BOARD_CB_PCIDIO24,
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BOARD_CB_PCIDIO24H,
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BOARD_CB_PCIDIO48H_OLD,
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BOARD_CB_PCIDIO48H_NEW,
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BOARD_CB_PCIDIO96H,
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BOARD_NI_PCIDIO96,
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BOARD_NI_PCIDIO96B,
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BOARD_NI_PXI6508,
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BOARD_NI_PCI6503,
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BOARD_NI_PCI6503B,
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BOARD_NI_PCI6503X,
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BOARD_NI_PXI_6503,
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};
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struct pci_8255_boardinfo {
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const char *name;
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int dio_badr;
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int n_8255;
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unsigned int has_mite:1;
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};
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static const struct pci_8255_boardinfo pci_8255_boards[] = {
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[BOARD_ADLINK_PCI7224] = {
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.name = "adl_pci-7224",
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.dio_badr = 2,
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.n_8255 = 1,
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},
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[BOARD_ADLINK_PCI7248] = {
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.name = "adl_pci-7248",
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.dio_badr = 2,
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.n_8255 = 2,
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},
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[BOARD_ADLINK_PCI7296] = {
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.name = "adl_pci-7296",
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.dio_badr = 2,
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.n_8255 = 4,
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},
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[BOARD_CB_PCIDIO24] = {
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.name = "cb_pci-dio24",
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.dio_badr = 2,
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.n_8255 = 1,
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},
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[BOARD_CB_PCIDIO24H] = {
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.name = "cb_pci-dio24h",
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.dio_badr = 2,
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.n_8255 = 1,
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},
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[BOARD_CB_PCIDIO48H_OLD] = {
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.name = "cb_pci-dio48h",
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.dio_badr = 1,
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.n_8255 = 2,
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},
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[BOARD_CB_PCIDIO48H_NEW] = {
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.name = "cb_pci-dio48h",
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.dio_badr = 2,
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.n_8255 = 2,
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},
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[BOARD_CB_PCIDIO96H] = {
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.name = "cb_pci-dio96h",
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.dio_badr = 2,
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.n_8255 = 4,
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},
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[BOARD_NI_PCIDIO96] = {
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.name = "ni_pci-dio-96",
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.dio_badr = 1,
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.n_8255 = 4,
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.has_mite = 1,
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},
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[BOARD_NI_PCIDIO96B] = {
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.name = "ni_pci-dio-96b",
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.dio_badr = 1,
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.n_8255 = 4,
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.has_mite = 1,
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},
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[BOARD_NI_PXI6508] = {
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.name = "ni_pxi-6508",
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.dio_badr = 1,
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.n_8255 = 4,
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.has_mite = 1,
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},
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[BOARD_NI_PCI6503] = {
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.name = "ni_pci-6503",
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.dio_badr = 1,
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.n_8255 = 1,
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.has_mite = 1,
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},
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[BOARD_NI_PCI6503B] = {
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.name = "ni_pci-6503b",
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.dio_badr = 1,
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.n_8255 = 1,
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.has_mite = 1,
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},
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[BOARD_NI_PCI6503X] = {
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.name = "ni_pci-6503x",
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.dio_badr = 1,
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.n_8255 = 1,
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.has_mite = 1,
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},
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[BOARD_NI_PXI_6503] = {
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.name = "ni_pxi-6503",
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.dio_badr = 1,
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.n_8255 = 1,
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.has_mite = 1,
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},
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};
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/* ripped from mite.h and mite_setup2() to avoid mite dependency */
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#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
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#define WENAB BIT(7) /* window enable */
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static int pci_8255_mite_init(struct pci_dev *pcidev)
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{
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void __iomem *mite_base;
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u32 main_phys_addr;
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/* ioremap the MITE registers (BAR 0) temporarily */
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mite_base = pci_ioremap_bar(pcidev, 0);
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if (!mite_base)
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return -ENOMEM;
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/* set data window to main registers (BAR 1) */
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main_phys_addr = pci_resource_start(pcidev, 1);
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writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
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/* finished with MITE registers */
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iounmap(mite_base);
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return 0;
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}
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static int pci_8255_auto_attach(struct comedi_device *dev,
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unsigned long context)
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{
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struct pci_dev *pcidev = comedi_to_pci_dev(dev);
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const struct pci_8255_boardinfo *board = NULL;
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struct comedi_subdevice *s;
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int ret;
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int i;
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if (context < ARRAY_SIZE(pci_8255_boards))
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board = &pci_8255_boards[context];
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if (!board)
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return -ENODEV;
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dev->board_ptr = board;
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dev->board_name = board->name;
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ret = comedi_pci_enable(dev);
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if (ret)
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return ret;
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if (board->has_mite) {
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ret = pci_8255_mite_init(pcidev);
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if (ret)
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return ret;
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}
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if ((pci_resource_flags(pcidev, board->dio_badr) & IORESOURCE_MEM)) {
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dev->mmio = pci_ioremap_bar(pcidev, board->dio_badr);
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if (!dev->mmio)
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return -ENOMEM;
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} else {
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dev->iobase = pci_resource_start(pcidev, board->dio_badr);
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}
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/*
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* One, two, or four subdevices are setup by this driver depending
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* on the number of channels provided by the board. Each subdevice
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* has 24 channels supported by the 8255 module.
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*/
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ret = comedi_alloc_subdevices(dev, board->n_8255);
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if (ret)
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return ret;
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for (i = 0; i < board->n_8255; i++) {
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s = &dev->subdevices[i];
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if (dev->mmio)
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ret = subdev_8255_mm_init(dev, s, NULL, i * I8255_SIZE);
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else
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ret = subdev_8255_init(dev, s, NULL, i * I8255_SIZE);
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if (ret)
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return ret;
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}
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return 0;
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}
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static struct comedi_driver pci_8255_driver = {
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.driver_name = "8255_pci",
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.module = THIS_MODULE,
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.auto_attach = pci_8255_auto_attach,
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.detach = comedi_pci_detach,
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};
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static int pci_8255_pci_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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return comedi_pci_auto_config(dev, &pci_8255_driver, id->driver_data);
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}
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static const struct pci_device_id pci_8255_pci_table[] = {
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{ PCI_VDEVICE(ADLINK, 0x7224), BOARD_ADLINK_PCI7224 },
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{ PCI_VDEVICE(ADLINK, 0x7248), BOARD_ADLINK_PCI7248 },
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{ PCI_VDEVICE(ADLINK, 0x7296), BOARD_ADLINK_PCI7296 },
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{ PCI_VDEVICE(CB, 0x0028), BOARD_CB_PCIDIO24 },
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{ PCI_VDEVICE(CB, 0x0014), BOARD_CB_PCIDIO24H },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, 0x0000, 0x0000),
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.driver_data = BOARD_CB_PCIDIO48H_OLD },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, PCI_VENDOR_ID_CB, 0x000b),
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.driver_data = BOARD_CB_PCIDIO48H_NEW },
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{ PCI_VDEVICE(CB, 0x0017), BOARD_CB_PCIDIO96H },
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{ PCI_VDEVICE(NI, 0x0160), BOARD_NI_PCIDIO96 },
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{ PCI_VDEVICE(NI, 0x1630), BOARD_NI_PCIDIO96B },
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{ PCI_VDEVICE(NI, 0x13c0), BOARD_NI_PXI6508 },
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{ PCI_VDEVICE(NI, 0x0400), BOARD_NI_PCI6503 },
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{ PCI_VDEVICE(NI, 0x1250), BOARD_NI_PCI6503B },
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{ PCI_VDEVICE(NI, 0x17d0), BOARD_NI_PCI6503X },
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{ PCI_VDEVICE(NI, 0x1800), BOARD_NI_PXI_6503 },
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{ 0 }
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};
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MODULE_DEVICE_TABLE(pci, pci_8255_pci_table);
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static struct pci_driver pci_8255_pci_driver = {
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.name = "8255_pci",
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.id_table = pci_8255_pci_table,
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.probe = pci_8255_pci_probe,
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.remove = comedi_pci_auto_unconfig,
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};
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module_comedi_pci_driver(pci_8255_driver, pci_8255_pci_driver);
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MODULE_DESCRIPTION("COMEDI - Generic PCI based 8255 Digital I/O boards");
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MODULE_AUTHOR("Comedi https://www.comedi.org");
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MODULE_LICENSE("GPL");
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