602 lines
13 KiB
C
602 lines
13 KiB
C
/*******************************************************************************
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Intel(R) Gigabit Ethernet Linux driver
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Copyright(c) 2007 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _E1000_HW_H_
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#define _E1000_HW_H_
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include "e1000_mac.h"
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#include "e1000_regs.h"
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#include "e1000_defines.h"
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struct e1000_hw;
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#define E1000_DEV_ID_82576 0x10C9
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#define E1000_DEV_ID_82576_FIBER 0x10E6
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#define E1000_DEV_ID_82576_SERDES 0x10E7
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#define E1000_DEV_ID_82575EB_COPPER 0x10A7
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#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
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#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
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#define E1000_REVISION_2 2
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#define E1000_REVISION_4 4
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#define E1000_FUNC_1 1
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enum e1000_mac_type {
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e1000_undefined = 0,
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e1000_82575,
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e1000_82576,
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e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
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};
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enum e1000_media_type {
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e1000_media_type_unknown = 0,
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e1000_media_type_copper = 1,
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e1000_media_type_fiber = 2,
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e1000_media_type_internal_serdes = 3,
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e1000_num_media_types
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};
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enum e1000_nvm_type {
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e1000_nvm_unknown = 0,
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e1000_nvm_none,
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e1000_nvm_eeprom_spi,
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e1000_nvm_eeprom_microwire,
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e1000_nvm_flash_hw,
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e1000_nvm_flash_sw
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};
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enum e1000_nvm_override {
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e1000_nvm_override_none = 0,
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e1000_nvm_override_spi_small,
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e1000_nvm_override_spi_large,
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e1000_nvm_override_microwire_small,
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e1000_nvm_override_microwire_large
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};
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enum e1000_phy_type {
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e1000_phy_unknown = 0,
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e1000_phy_none,
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e1000_phy_m88,
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e1000_phy_igp,
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e1000_phy_igp_2,
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e1000_phy_gg82563,
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e1000_phy_igp_3,
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e1000_phy_ife,
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};
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enum e1000_bus_type {
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e1000_bus_type_unknown = 0,
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e1000_bus_type_pci,
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e1000_bus_type_pcix,
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e1000_bus_type_pci_express,
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e1000_bus_type_reserved
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};
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enum e1000_bus_speed {
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e1000_bus_speed_unknown = 0,
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e1000_bus_speed_33,
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e1000_bus_speed_66,
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e1000_bus_speed_100,
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e1000_bus_speed_120,
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e1000_bus_speed_133,
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e1000_bus_speed_2500,
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e1000_bus_speed_5000,
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e1000_bus_speed_reserved
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};
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enum e1000_bus_width {
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e1000_bus_width_unknown = 0,
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e1000_bus_width_pcie_x1,
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e1000_bus_width_pcie_x2,
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e1000_bus_width_pcie_x4 = 4,
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e1000_bus_width_pcie_x8 = 8,
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e1000_bus_width_32,
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e1000_bus_width_64,
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e1000_bus_width_reserved
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};
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enum e1000_1000t_rx_status {
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e1000_1000t_rx_status_not_ok = 0,
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e1000_1000t_rx_status_ok,
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e1000_1000t_rx_status_undefined = 0xFF
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};
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enum e1000_rev_polarity {
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e1000_rev_polarity_normal = 0,
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e1000_rev_polarity_reversed,
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e1000_rev_polarity_undefined = 0xFF
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};
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enum e1000_fc_type {
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e1000_fc_none = 0,
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e1000_fc_rx_pause,
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e1000_fc_tx_pause,
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e1000_fc_full,
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e1000_fc_default = 0xFF
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};
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/* Receive Descriptor */
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struct e1000_rx_desc {
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__le64 buffer_addr; /* Address of the descriptor's data buffer */
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__le16 length; /* Length of data DMAed into data buffer */
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__le16 csum; /* Packet checksum */
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u8 status; /* Descriptor status */
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u8 errors; /* Descriptor Errors */
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__le16 special;
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};
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/* Receive Descriptor - Extended */
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union e1000_rx_desc_extended {
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struct {
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__le64 buffer_addr;
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__le64 reserved;
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} read;
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struct {
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struct {
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__le32 mrq; /* Multiple Rx Queues */
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union {
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__le32 rss; /* RSS Hash */
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struct {
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__le16 ip_id; /* IP id */
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__le16 csum; /* Packet Checksum */
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} csum_ip;
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} hi_dword;
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} lower;
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struct {
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__le32 status_error; /* ext status/error */
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__le16 length;
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__le16 vlan; /* VLAN tag */
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} upper;
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} wb; /* writeback */
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};
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#define MAX_PS_BUFFERS 4
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/* Receive Descriptor - Packet Split */
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union e1000_rx_desc_packet_split {
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struct {
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/* one buffer for protocol header(s), three data buffers */
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__le64 buffer_addr[MAX_PS_BUFFERS];
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} read;
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struct {
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struct {
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__le32 mrq; /* Multiple Rx Queues */
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union {
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__le32 rss; /* RSS Hash */
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struct {
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__le16 ip_id; /* IP id */
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__le16 csum; /* Packet Checksum */
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} csum_ip;
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} hi_dword;
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} lower;
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struct {
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__le32 status_error; /* ext status/error */
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__le16 length0; /* length of buffer 0 */
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__le16 vlan; /* VLAN tag */
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} middle;
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struct {
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__le16 header_status;
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__le16 length[3]; /* length of buffers 1-3 */
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} upper;
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__le64 reserved;
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} wb; /* writeback */
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};
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/* Transmit Descriptor */
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struct e1000_tx_desc {
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__le64 buffer_addr; /* Address of the descriptor's data buffer */
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union {
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__le32 data;
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struct {
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__le16 length; /* Data buffer length */
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u8 cso; /* Checksum offset */
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u8 cmd; /* Descriptor control */
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} flags;
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} lower;
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union {
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__le32 data;
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struct {
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u8 status; /* Descriptor status */
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u8 css; /* Checksum start */
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__le16 special;
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} fields;
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} upper;
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};
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/* Offload Context Descriptor */
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struct e1000_context_desc {
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union {
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__le32 ip_config;
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struct {
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u8 ipcss; /* IP checksum start */
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u8 ipcso; /* IP checksum offset */
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__le16 ipcse; /* IP checksum end */
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} ip_fields;
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} lower_setup;
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union {
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__le32 tcp_config;
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struct {
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u8 tucss; /* TCP checksum start */
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u8 tucso; /* TCP checksum offset */
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__le16 tucse; /* TCP checksum end */
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} tcp_fields;
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} upper_setup;
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__le32 cmd_and_length;
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union {
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__le32 data;
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struct {
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u8 status; /* Descriptor status */
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u8 hdr_len; /* Header length */
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__le16 mss; /* Maximum segment size */
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} fields;
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} tcp_seg_setup;
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};
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/* Offload data descriptor */
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struct e1000_data_desc {
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__le64 buffer_addr; /* Address of the descriptor's buffer address */
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union {
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__le32 data;
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struct {
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__le16 length; /* Data buffer length */
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u8 typ_len_ext;
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u8 cmd;
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} flags;
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} lower;
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union {
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__le32 data;
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struct {
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u8 status; /* Descriptor status */
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u8 popts; /* Packet Options */
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__le16 special;
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} fields;
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} upper;
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};
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/* Statistics counters collected by the MAC */
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struct e1000_hw_stats {
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u64 crcerrs;
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u64 algnerrc;
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u64 symerrs;
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u64 rxerrc;
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u64 mpc;
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u64 scc;
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u64 ecol;
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u64 mcc;
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u64 latecol;
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u64 colc;
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u64 dc;
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u64 tncrs;
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u64 sec;
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u64 cexterr;
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u64 rlec;
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u64 xonrxc;
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u64 xontxc;
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u64 xoffrxc;
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u64 xofftxc;
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u64 fcruc;
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u64 prc64;
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u64 prc127;
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u64 prc255;
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u64 prc511;
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u64 prc1023;
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u64 prc1522;
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u64 gprc;
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u64 bprc;
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u64 mprc;
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u64 gptc;
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u64 gorc;
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u64 gotc;
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u64 rnbc;
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u64 ruc;
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u64 rfc;
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u64 roc;
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u64 rjc;
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u64 mgprc;
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u64 mgpdc;
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u64 mgptc;
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u64 tor;
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u64 tot;
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u64 tpr;
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u64 tpt;
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u64 ptc64;
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u64 ptc127;
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u64 ptc255;
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u64 ptc511;
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u64 ptc1023;
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u64 ptc1522;
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u64 mptc;
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u64 bptc;
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u64 tsctc;
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u64 tsctfc;
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u64 iac;
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u64 icrxptc;
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u64 icrxatc;
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u64 ictxptc;
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u64 ictxatc;
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u64 ictxqec;
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u64 ictxqmtc;
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u64 icrxdmtc;
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u64 icrxoc;
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u64 cbtmpc;
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u64 htdpmc;
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u64 cbrdpc;
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u64 cbrmpc;
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u64 rpthc;
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u64 hgptc;
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u64 htcbdpc;
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u64 hgorc;
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u64 hgotc;
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u64 lenerrs;
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u64 scvpc;
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u64 hrmpc;
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};
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struct e1000_phy_stats {
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u32 idle_errors;
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u32 receive_errors;
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};
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struct e1000_host_mng_dhcp_cookie {
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u32 signature;
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u8 status;
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u8 reserved0;
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u16 vlan_id;
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u32 reserved1;
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u16 reserved2;
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u8 reserved3;
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u8 checksum;
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};
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/* Host Interface "Rev 1" */
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struct e1000_host_command_header {
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u8 command_id;
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u8 command_length;
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u8 command_options;
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u8 checksum;
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};
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#define E1000_HI_MAX_DATA_LENGTH 252
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struct e1000_host_command_info {
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struct e1000_host_command_header command_header;
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u8 command_data[E1000_HI_MAX_DATA_LENGTH];
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};
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/* Host Interface "Rev 2" */
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struct e1000_host_mng_command_header {
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u8 command_id;
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u8 checksum;
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u16 reserved1;
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u16 reserved2;
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u16 command_length;
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};
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#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
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struct e1000_host_mng_command_info {
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struct e1000_host_mng_command_header command_header;
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u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
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};
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#include "e1000_mac.h"
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#include "e1000_phy.h"
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#include "e1000_nvm.h"
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struct e1000_mac_operations {
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s32 (*check_for_link)(struct e1000_hw *);
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s32 (*reset_hw)(struct e1000_hw *);
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s32 (*init_hw)(struct e1000_hw *);
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bool (*check_mng_mode)(struct e1000_hw *);
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s32 (*setup_physical_interface)(struct e1000_hw *);
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void (*rar_set)(struct e1000_hw *, u8 *, u32);
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s32 (*read_mac_addr)(struct e1000_hw *);
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s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
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};
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struct e1000_phy_operations {
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s32 (*acquire_phy)(struct e1000_hw *);
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s32 (*check_reset_block)(struct e1000_hw *);
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s32 (*force_speed_duplex)(struct e1000_hw *);
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s32 (*get_cfg_done)(struct e1000_hw *hw);
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s32 (*get_cable_length)(struct e1000_hw *);
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s32 (*get_phy_info)(struct e1000_hw *);
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s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *);
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void (*release_phy)(struct e1000_hw *);
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s32 (*reset_phy)(struct e1000_hw *);
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s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
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s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
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s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
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};
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struct e1000_nvm_operations {
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s32 (*acquire_nvm)(struct e1000_hw *);
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s32 (*read_nvm)(struct e1000_hw *, u16, u16, u16 *);
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void (*release_nvm)(struct e1000_hw *);
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s32 (*write_nvm)(struct e1000_hw *, u16, u16, u16 *);
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};
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struct e1000_info {
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s32 (*get_invariants)(struct e1000_hw *);
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struct e1000_mac_operations *mac_ops;
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struct e1000_phy_operations *phy_ops;
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struct e1000_nvm_operations *nvm_ops;
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};
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extern const struct e1000_info e1000_82575_info;
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struct e1000_mac_info {
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struct e1000_mac_operations ops;
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u8 addr[6];
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u8 perm_addr[6];
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enum e1000_mac_type type;
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u32 collision_delta;
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u32 ledctl_default;
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u32 ledctl_mode1;
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u32 ledctl_mode2;
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u32 mc_filter_type;
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u32 tx_packet_delta;
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u32 txcw;
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u16 current_ifs_val;
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u16 ifs_max_val;
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u16 ifs_min_val;
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u16 ifs_ratio;
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u16 ifs_step_size;
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u16 mta_reg_count;
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u16 rar_entry_count;
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u8 forced_speed_duplex;
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bool adaptive_ifs;
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bool arc_subsystem_valid;
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bool asf_firmware_present;
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bool autoneg;
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bool autoneg_failed;
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bool disable_av;
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bool disable_hw_init_bits;
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bool get_link_status;
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bool ifs_params_forced;
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bool in_ifs_mode;
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bool report_tx_early;
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bool serdes_has_link;
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bool tx_pkt_filtering;
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};
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struct e1000_phy_info {
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struct e1000_phy_operations ops;
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enum e1000_phy_type type;
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enum e1000_1000t_rx_status local_rx;
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enum e1000_1000t_rx_status remote_rx;
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enum e1000_ms_type ms_type;
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enum e1000_ms_type original_ms_type;
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enum e1000_rev_polarity cable_polarity;
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enum e1000_smart_speed smart_speed;
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u32 addr;
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u32 id;
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u32 reset_delay_us; /* in usec */
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u32 revision;
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enum e1000_media_type media_type;
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u16 autoneg_advertised;
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u16 autoneg_mask;
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u16 cable_length;
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u16 max_cable_length;
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u16 min_cable_length;
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u8 mdix;
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bool disable_polarity_correction;
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bool is_mdix;
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bool polarity_correction;
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bool reset_disable;
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bool speed_downgraded;
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bool autoneg_wait_to_complete;
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};
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struct e1000_nvm_info {
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struct e1000_nvm_operations ops;
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enum e1000_nvm_type type;
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enum e1000_nvm_override override;
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u32 flash_bank_size;
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u32 flash_base_addr;
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u16 word_size;
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u16 delay_usec;
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u16 address_bits;
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u16 opcode_bits;
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u16 page_size;
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};
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struct e1000_bus_info {
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enum e1000_bus_type type;
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enum e1000_bus_speed speed;
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enum e1000_bus_width width;
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u32 snoop;
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u16 func;
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u16 pci_cmd_word;
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};
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struct e1000_fc_info {
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u32 high_water; /* Flow control high-water mark */
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u32 low_water; /* Flow control low-water mark */
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u16 pause_time; /* Flow control pause timer */
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bool send_xon; /* Flow control send XON */
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bool strict_ieee; /* Strict IEEE mode */
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enum e1000_fc_type type; /* Type of flow control */
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|
enum e1000_fc_type original_type;
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};
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|
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struct e1000_hw {
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void *back;
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void *dev_spec;
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|
|
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u8 __iomem *hw_addr;
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u8 __iomem *flash_address;
|
|
unsigned long io_base;
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|
|
|
struct e1000_mac_info mac;
|
|
struct e1000_fc_info fc;
|
|
struct e1000_phy_info phy;
|
|
struct e1000_nvm_info nvm;
|
|
struct e1000_bus_info bus;
|
|
struct e1000_host_mng_dhcp_cookie mng_cookie;
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|
|
|
u32 dev_spec_size;
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|
|
|
u16 device_id;
|
|
u16 subsystem_vendor_id;
|
|
u16 subsystem_device_id;
|
|
u16 vendor_id;
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|
|
|
u8 revision_id;
|
|
};
|
|
|
|
#ifdef DEBUG
|
|
extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
|
|
#define hw_dbg(format, arg...) \
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|
printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
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#else
|
|
#define hw_dbg(format, arg...)
|
|
#endif
|
|
|
|
#endif
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