Sergei Shtylyov 21ab095cbc clk: renesas: r8a77980: Fix RPC-IF module clock's parent ... Testing has shown that the RPC-IF module clock's parent is the RPCD2 clock, not the RPC one -- the RPC-IF register reads stall otherwise... Fixes: 94e3935b57 ("clk: renesas: r8a77980: Add RPC clocks") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>		2019-04-02 10:31:05 +02:00
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Kconfig	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00
Makefile	clk: renesas: cpg-mssr: Add r8a774c0 support	2018-09-19 16:42:14 +02:00
clk-div6.c	clk: renesas: Remove usage of CLK_IS_BASIC	2018-12-10 14:43:04 -08:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-mstp.c	Merge branch 'clk-of' into clk-next	2018-12-14 14:02:55 -08:00
clk-r8a73a4.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7740.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7778.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7779.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rcar-gen2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rz.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-sh73a0.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
r7s9210-cpg-mssr.c	clk: renesas: r7s9210: Always use readl()	2019-04-02 09:50:48 +02:00
r8a774a1-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r8a774c0-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r8a7743-cpg-mssr.c	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00
r8a7745-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7790-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7791-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7792-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7794-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a7796-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77470-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
r8a77965-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77970-cpg-mssr.c	clk: renesas: r8a77970: Add CPEX clock	2018-12-04 10:29:48 +01:00
r8a77980-cpg-mssr.c	clk: renesas: r8a77980: Fix RPC-IF module clock's parent	2019-04-02 10:31:05 +02:00
r8a77990-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77995-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Add missing PCI USB clock	2019-04-02 09:50:48 +02:00
rcar-gen2-cpg.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
rcar-gen2-cpg.h	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents	2019-04-02 09:50:48 +02:00
rcar-gen3-cpg.h	clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2	2019-04-02 09:50:48 +02:00
rcar-usb2-clock-sel.c	clk: renesas: use SPDX identifier for Renesas drivers	2018-08-30 18:18:44 -07:00
renesas-cpg-mssr.c	clk: renesas: Remove usage of CLK_IS_BASIC	2018-12-10 14:43:04 -08:00
renesas-cpg-mssr.h	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00