34 lines
1.2 KiB
ReStructuredText
34 lines
1.2 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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===========================
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Low Power Idle Table (LPIT)
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===========================
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To enumerate platform Low Power Idle states, Intel platforms are using
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“Low Power Idle Table” (LPIT). More details about this table can be
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downloaded from:
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http://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf
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Residencies for each low power state can be read via FFH
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(Function fixed hardware) or a memory mapped interface.
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On platforms supporting S0ix sleep states, there can be two types of
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residencies:
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- CPU PKG C10 (Read via FFH interface)
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- Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
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The following attributes are added dynamically to the cpuidle
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sysfs attribute group::
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/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
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/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
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The "low_power_idle_cpu_residency_us" attribute shows time spent
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by the CPU package in PKG C10
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The "low_power_idle_system_residency_us" attribute shows SLP_S0
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residency, or system time spent with the SLP_S0# signal asserted.
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This is the lowest possible system power state, achieved only when CPU is in
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PKG C10 and all functional blocks in PCH are in a low power state.
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