203 lines
5.9 KiB
C
203 lines
5.9 KiB
C
/*
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* Copyright (C) 2008-2009 ST-Ericsson SA
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/platform_data/arm-ux500-pm.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/perf/arm_pmu.h>
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#include <linux/regulator/machine.h>
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#include <asm/outercache.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include "setup.h"
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#include "board-mop500.h"
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#include "db8500-regs.h"
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static int __init ux500_l2x0_unlock(void)
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{
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int i;
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struct device_node *np;
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void __iomem *l2x0_base;
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np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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l2x0_base = of_iomap(np, 0);
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of_node_put(np);
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if (!l2x0_base)
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return -ENODEV;
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/*
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* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
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* apparently locks both caches before jumping to the kernel. The
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* l2x0 core will not touch the unlock registers if the l2x0 is
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* already enabled, so we do it right here instead. The PL310 has
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* 8 sets of registers, one per possible CPU.
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*/
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for (i = 0; i < 8; i++) {
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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}
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iounmap(l2x0_base);
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return 0;
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}
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static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
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{
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/*
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* We can't write to secure registers as we are in non-secure
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* mode, until we have some SMI service available.
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*/
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}
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/*
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* FIXME: Should we set up the GPIO domain here?
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*
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* The problem is that we cannot put the interrupt resources into the platform
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* device until the irqdomain has been added. Right now, we set the GIC interrupt
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* domain from init_irq(), then load the gpio driver from
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* core_initcall(nmk_gpio_init) and add the platform devices from
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* arch_initcall(customize_machine).
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*
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* This feels fragile because it depends on the gpio device getting probed
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* _before_ any device uses the gpio interrupts.
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*/
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static void __init ux500_init_irq(void)
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{
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struct device_node *np;
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struct resource r;
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irqchip_init();
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np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
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of_address_to_resource(np, 0, &r);
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of_node_put(np);
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if (!r.start) {
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pr_err("could not find PRCMU base resource\n");
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return;
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}
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prcmu_early_init(r.start, r.end-r.start);
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ux500_pm_init(r.start, r.end-r.start);
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/* Unlock before init */
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ux500_l2x0_unlock();
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outer_cache.write_sec = ux500_l2c310_write_sec;
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}
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static void ux500_restart(enum reboot_mode mode, const char *cmd)
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{
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local_irq_disable();
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local_fiq_disable();
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prcmu_system_reset(0);
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}
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/*
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* The PMU IRQ lines of two cores are wired together into a single interrupt.
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* Bounce the interrupt to the other core if it's not ours.
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*/
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static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
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{
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irqreturn_t ret = handler(irq, dev);
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int other = !smp_processor_id();
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if (ret == IRQ_NONE && cpu_online(other))
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irq_set_affinity(irq, cpumask_of(other));
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/*
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* We should be able to get away with the amount of IRQ_NONEs we give,
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* while still having the spurious IRQ detection code kick in if the
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* interrupt really starts hitting spuriously.
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*/
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return ret;
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}
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static struct arm_pmu_platdata db8500_pmu_platdata = {
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.handle_irq = db8500_pmu_handler,
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};
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static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
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/* Requires call-back bindings. */
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OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
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/* Requires DMA bindings. */
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
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"ux500-msp-i2s.0", &msp0_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
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"ux500-msp-i2s.1", &msp1_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
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"ux500-msp-i2s.2", &msp2_platform_data),
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OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
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"ux500-msp-i2s.3", &msp3_platform_data),
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/* Requires non-DT:able platform data. */
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OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
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OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
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OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
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OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
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NULL),
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{},
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};
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static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
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{},
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};
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static const struct of_device_id u8500_local_bus_nodes[] = {
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/* only create devices below soc node */
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{ .compatible = "stericsson,db8500", },
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{ .compatible = "stericsson,db8500-prcmu", },
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{ .compatible = "simple-bus"},
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{ },
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};
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static void __init u8500_init_machine(void)
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{
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/* automatically probe child nodes of dbx5x0 devices */
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if (of_machine_is_compatible("st-ericsson,u8540"))
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of_platform_populate(NULL, u8500_local_bus_nodes,
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u8540_auxdata_lookup, NULL);
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else
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of_platform_populate(NULL, u8500_local_bus_nodes,
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u8500_auxdata_lookup, NULL);
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}
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static const char * stericsson_dt_platform_compat[] = {
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"st-ericsson,u8500",
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"st-ericsson,u8540",
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"st-ericsson,u9500",
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"st-ericsson,u9540",
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NULL,
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};
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DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.init_irq = ux500_init_irq,
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.init_machine = u8500_init_machine,
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.dt_compat = stericsson_dt_platform_compat,
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.restart = ux500_restart,
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MACHINE_END
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